| Commit message (Collapse) | Author | Age | Files | Lines |
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Update #2271.
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This allows the BSP to define an optional spin delay which is
useful for making time appear to pass at a rate closer to
wall time. On the Edison, this was used with a polled console
driver to slow polling to a reasonable rate and make time
pass reasonably close to correctly even with no clock tick
support.
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Script does what is expected and tries to do it as
smartly as possible.
+ remove occurrences of two blank comment lines
next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
contain CVS Ids
+ If the processing left a blank line at the top of
a file, it was removed.
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* clock_driver_simidle.c: Ensure ISR nest level and Thread Dispatch
disable level are in the same state they would be in a true ISR. This
ensures that all of the clock tick handling is as similar as possible
in this limited environment.
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* clockdrv_shell.c: Empty file. Add warning to not use this file.
* clock_driver_simidle.c: include clockdrv_shell.h.
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* clock_driver_simidle.c: New file.
This implementation is for BSPs for simulators without a clock tick
ISR. It provides a special IDLE task that calls rtems_clock_tick()
repeatedly when the application ends up in the IDLE task. This
simulates time advancing. It is enough to run many tests but
will not result in the correct behavior when you want timeslicing.
This is because timeslicing assumes that a tick ISR determines
that the currently executing thread must be switched out. Without
a clock tick ISR, this will not occur.
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