| Commit message (Collapse) | Author | Age | Files | Lines |
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The 32-bit ABIs for thread-local storage (TLS) and EABI read-only
small-data area have a conflicting register (r2) usage. Use the System
V small-data instead (here r2 is system reserved).
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Instead of SPRG0 (= special purpose register 272) use the new global
symbol _PPC_INTERRUPT_DISABLE_MASK to store the interrupt disable mask.
The benefit is that it is now possible to disable interrupts without
further run-time initialization in boot_card().
At least on Freescale e500 cores this leads also to a faster execution
since the mfmsr and mfspr instruction require four cycles to complete.
The instructions to load the mask value can execute while the mfmsr is
in progress.
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Add a CPU counter interface to allow access to a free-running counter.
It is useful to measure short time intervals. This can be used for
example to enable profiling of critical low-level functions.
Add two busy wait functions rtems_counter_delay_ticks() and
rtems_counter_delay_nanoseconds() implemented via the CPU counter.
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This requires at least Binutils 2.24.
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Delete ppc_exc_vector_base. Add and use
ppc_exc_initialize_with_vector_base().
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In case the VMA and LMA regions differ, the LMA start address is now no
longer aligned with the alignment of the input sections:
http://sourceware.org/bugzilla/show_bug.cgi?id=15222
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Include <bsp/default-initial-extension.h> in all BSPs. Call
rtems_fatal() with RTEMS_FATAL_SOURCE_EXIT as source and the exit()
status code as fatal code in every bsp_cleanup(). Move previous
bsp_cleanup() code into bsp_fatal_extension().
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This reverts commit daffa606cc4a45d93c1f0f4fe365fde0fda6acbb.
Conflicts:
c/src/lib/libbsp/arm/lpc24xx/include/bspopts.h.in
c/src/lib/libbsp/powerpc/mpc55xxevb/include/bspopts.h.in
c/src/lib/libbsp/powerpc/qoriq/include/bspopts.h.in
Manually deleted conflicting files.
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Replace the "NIRVANA" region with the more verbose "UNEXPECTED_SECTIONS"
region. Move the region definition into the "linkcmds.base" files.
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