| Commit message (Collapse) | Author | Age | Files | Lines |
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PR 288/rtems
* irq/irq_asm.S, startup/bspstart.c: _ISR_Nest_level is now properly
maintained and any BSP which does not do so will trip a panic in the
shared code.
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PR 415/bsps
* pci/detect_raven_bridge.c, startup/bspstart.c:
This patch reverts enabling MCP interrupts for the motorola_powerpc
BSPs. REASON: pci config space scanning (as e.g. done by the DEC
Ethernet driver) would raise machine check exceptions.
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PR 428/bsps
PR 432/bsps
* bootloader/pci.c: Re-instated code that prevents remapping small
IO regions, which if remapped would cause i8259 registers to move
out from under the #define'd base addresses.
* startup/bspstart.c: Reduced BAT2 PCI memory allocation to 256
megs, I incorrectly had extended it which would cause problems with
PCI devices that defined prefetchable memory.
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PR 405/bsps
* bootloader/pci.c: Added support for configuring devices for pci
busses > 0
* pci/pci.c, pci/pci.h: Added FixupPCI() to store vectors in the
INTERRUPT_LINE register of pci devices any # of hops away
from the host processor.
* motorola/motorola.c, motorola/motorola.h: Added interrupt
routing tables in support of FixupPCI. This is board-specific,
each board will have to supply information for FixupPCI() to do
anything for it.
* startup/bspstart.c: Extended bat2 to cover entire PCI address space.
* irq/irq.c, irq/irq.h: Added support for shared interrupts.
Existing single hander vectors are undisturbed, a new function
added to allow adding/removing handlers from a vector.
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PR 415/bsps
* include/bsp.h, pci/detect_raven_bridge.c, startup/bspstart.c:
Support enabling MCP exceptions on the host bridge. This can
be used for memory probing on the VME bus.
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PR 356/bsps
This patch makes RTEMS/powerpc/shared EABI compliant.
* irq/irq_init.c, start/Makefile.am, start/start.S, startup/bspstart.c,
startup/pgtbl_setup.c, vectors/vectors.h, vectors/vectors_init.c:
zero_bss() should clear not only bss but sbss and sbss2
also (this is probably a bugfix, as sbss/sbss2 are
probably used even if -msdata=eabi is not specified).
* start/rtems_crti.S: New file which must
be linked immediately after ecrti.o. rtems_crti.o contains
a code snippet who lets __init() return immediately. Also,
a new entry point '_init' to the C++ Ctors is generated
for use by the RTEMS Thread_Handler.
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PR 349/bsps
* startup/pgtbl_setup.c, startup/pgtbl_activate.c: New files
* startup/Makefile.am, startup/bspstart.c, startup/linkcmds:
Let the powerpc/shared (+derived) BSPs use pagetable support
from libcpu.
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PR 349/bsps
* console/console.c, console/uart.c, console/uart.h: implement
IOCTLs for the serial (UART) console to install/retrieve a BREAK-IRQ
callback. The callback routine (if installed) is invoked from the
UART ISR when a BREAK interrupt is detected. This can be used
e.g. to enforce a "hotkey" reboot a la vxWorks Ctrl-X (although we
use the serial line break condition) NOTE: The callback runs in
ISR context.
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* bootloader/misc.c, console/Makefile.am, console/console.c,
console/consoleIo.h, console/inch.c, console/polled_io.c,
console/uart.c, console/uart.h, include/bsp.h, irq/Makefile.am,
irq/irq.c, irq/irq.h, irq/irq_init.c, openpic/openpic.c,
openpic/openpic.h, pci/Makefile.am, pci/pci.c, pci/pci.h,
residual/Makefile.am, start/start.S, startup/bspstart.c,
vectors/vectors.S, vectors/vectors.h, vectors/vectors_init.c:
Per PR216, "libbsp/powerpc/shared" BSP has been modified considerably
with the goal to make it more flexible and reusable by other
BSPs. The main strategies were:
- eliminate hardcoded base addresses; devices use offsets
and a BSP defined base address.
- separate functionality into different files (e.g. reboot from
inch.c to reboot.c) which can be overridden by a 'derived' BSP.
- separate initialization code into separate files (e.g. PCI
bridge detection/initialization was separated from the more
generic PCI access routines), also to make it easier for
'derived' BSPs to substitute their own initialization code.
There are also a couple of enhancements and fixes:
- IRQ handling code now has a hook for attaching a VME bridge.
- OpenPIC is now explicitely initialized (polarities, senses).
Eliminated the implicit assumption on the presence of an ISA PIC.
- UART and console driver now supports more than 1 port. The current
maximum of 2 can easily be extended by enlarging a table (it
would even be easier if the ISR API was not broken by design).
- fixed polled_io.c so it correctly supports console on COM2
- fixed TLB invalidation code (start.S).
- exception handler prints a stack backtrace.
- added BSP_pciFindDevice() to scan the pci bus for a particular
vendor/device/instance.
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* startup/linkcmds: In support of gcc 3.1, added one of more
of the sections .jcr, .rodata*, .data.*, .gnu.linkonce.s2.*,
.gnu.linkonce.sb2.*, and .gnu.linkonce.s.*. Spacing corrections
and direction of segments to memory regions may also have been
addressed. This was a sweep across all BSPs.
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* startup/bspstart.c: Include <libcpu/cpuIdent.h>.
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* startup/linkcmds: Per PR170, PR171, and PR172 add .eh_frame
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* configure.ac:
AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS).
AM_INIT_AUTOMAKE([no-define foreign 1.6]).
* Makefile.am: Remove AUTOMAKE_OPTIONS.
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* startup/linkcmds: Added _init and _fini.
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* clock/p_clock.c, startup/bspstart.c: Fixed typo.
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* startup/bspstart.c: assoc.h, error.h, libio_.h, libio.h,
and libcsupport.h moved from libc to lib/include/rtems and
now must be referenced as <rtems/XXX.h>. Header file order
was cleaned up while doing this.
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* startup/linkcmds: Added lines so DWARF debug information
would be available. Otherwise gdb complains that the offsets
for the debug info are incorrect and doesn't load the files.
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adds .cvsignore.
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Ralf Corsepius <corsepiu@faw.uni-ulm.de> that contain:
* Modifications, (minor) corrections, cleanups to most existing
Makefile.ams
* Adds automake support to all remaining BSPs which have not yet been
converted to automake.
* Makefile.am for all remaining wrapup/Makefile.ams
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which converts the PowerPC BSPs to configuration and more automake.
* Besides adding partial automake support, rsp converting all powerpc
BSPs to make them compliant to the new configuration scheme, this patch
attempts to fix several configuration bugs in powerpc related Makefiles.
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<valette@crf.canon.fr> and Jay Kulpinski <jskulpin@eng01.gdds.com>.
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As part of this effort, the mpc750 libcpu code is now shared with the
ppc6xx.
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