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2000-09-052000-09-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill10-22/+34
* clock/Makefile.am, console/Makefile.am, start/Makefile.am, startup/Makefile.am, timer/Makefile.am, wrapup/Makefile.am: Include compile.am
2000-08-10Adding ChangeLogs.Joel Sherrill4-0/+12
2000-07-26Port of RTEMS to the Texas Instruments C3x/C4x DSP families includingJoel Sherrill3-0/+17
a BSP (c4xsim) supporting the simulator included with gdb. This port was done by Joel Sherrill and Jennifer Averett of OAR Corporation. Also included with this port is a space/time optimization to eliminate FP context switch management on CPUs without hardware or software FP. An issue with this port was that sizeof(unsigned32) = sizeof(unsigned8) on this CPU. This required addressing alignment checks and assumptions as well as fixing code that assumed sizeof(unsigned32) == 4.
2000-07-26Port of RTEMS to the Texas Instruments C3x/C4x DSP families includingJoel Sherrill12-20/+42
a BSP (c4xsim) supporting the simulator included with gdb. This port was done by Joel Sherrill and Jennifer Averett of OAR Corporation. Also included with this port is a space/time optimization to eliminate FP context switch management on CPUs without hardware or software FP. An issue with this port was that sizeof(unsigned32) = sizeof(unsigned8) on this CPU. This required addressing alignment checks and assumptions as well as fixing code that assumed sizeof(unsigned32) == 4.
2000-02-29BSP now compiles and links with CAVSL board information. This includesJoel Sherrill3-7/+2
linkcmds updated, simio references removed, and switch to libchip for serial ports from simio. Added a MEMORY_MAP file to capture information about the various addresses on this board. In addition, many of the beta patches are now included.
2000-02-22New port of RTEMS to TI C3x and C4x.Joel Sherrill32-0/+2322
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