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* RaspberryPi: Use rtems_configuration_get_microseconds_per_tick to set clock ↵Jan Sommer2015-07-071-2/+4
| | | | | | | | counter timer interrupt was hard coded to 10 ms per tick. Fix uses the setting of CONFIGURE_MICROSECONDS_PER_TICK to compute the correct start value for the counter See for more information: http://permalink.gmane.org/gmane.os.rtems.user/22691
* bsps/arm: Update due to API changesSebastian Huber2015-06-261-2/+2
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* beagle bsp: RTC support for BBBragunath2015-05-283-0/+283
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* arm/shared/lpc/clock/lpc-clock-config.c: Remove unused variable warningJoel Sherrill2015-05-211-1/+0
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* Multiple bsp_specs: Change *(old_endfile) to %(old_endfile)Joel Sherrill2015-05-2121-21/+21
| | | | | | Fix typo. closes 2345.
* bsp/tms570: TypoSebastian Huber2015-05-211-1/+1
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* bsps: Convert clock drivers to use a timecounterAlexander Krutwig2015-05-2012-138/+110
| | | | Update #2271.
* lpc1768_mbed_ahb_ram_eth-testsuite.tcfg: Add sptls02Joel Sherrill2015-04-231-0/+1
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* lm3s3749-testsuite.tcfg: Add cdtestJoel Sherrill2015-04-232-0/+2
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* tms570/startup/bspreset.c: Add include <bsp/bootcard.h> to fix warningJoel Sherrill2015-04-151-14/+15
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* bsp/altera-cyclone-v: Add RTC driverThomas Volgmann2015-04-101-144/+622
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* Add hardware FPU flags for Raspberry Pi 2 BSPAlan Cudmore2015-04-091-1/+1
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* rtl22xx-testsuite.tcfg: Add fileioJoel Sherrill2015-04-031-0/+1
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* bsp/altera-cyclone-v: Fix define usageSebastian Huber2015-04-021-1/+1
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* TMS570: Add board reset code to bsp_resetMartin Galvan2015-03-312-22/+34
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* TMS570: Enable FPU in makefile.Martin Galvan2015-03-271-1/+1
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* bsp/altera-cyclone-v: TypoSebastian Huber2015-03-251-3/+3
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* nds/libnds/source/arm9/image.c: Add needed castJoel Sherrill2015-03-241-1/+1
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* nds/libnds/source/arm7/clock.c: Avoid over indexing arrayJoel Sherrill2015-03-241-1/+1
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* lpc176x/console/console-config.c: Conditionalize code to avoid unused warningsJoel Sherrill2015-03-241-0/+4
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* Replace www.rtems.com with www.rtems.orgSebastian Huber2015-03-2054-54/+54
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* bsp/rtl22xx: Add prefix due to name conflictsSebastian Huber2015-03-201-5/+5
| | | | Close #2303.
* Add CAN, PWM, ADC and UART1/2/3 support to the LPC176x BSP.Martin Galvan2015-03-2019-8/+1879
| | | | | | | | | | This patch adds support for the following devices to the LPC176x BSP: * CAN * PWM * ADC It also adds the probe routines for UART1/2/3 to the console_device_table in console-config.c, and enables UART1 in configure.ac.
* arm/lpc24xx/make/custom/lpc23xx_tli800-testsuite.tcfg: Add tmfine01Joel Sherrill2015-03-171-0/+1
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* arm/lpc24xx/make/custom/lpc2362-testsuite.tcfg: Add tmfine01Joel Sherrill2015-03-171-0/+1
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* arm/lpc176x/make/custom/lpc1768_mbed_ahb_ram_eth-testsuite.tcfg: Add tmfine01Joel Sherrill2015-03-171-0/+1
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* arm/lpc176x/make/custom/lpc1768_mbed_ahb_ram-testsuite.tcfg: Add tmfine01Joel Sherrill2015-03-171-0/+1
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* arm/lpc176x/make/custom/lpc1768_mbed-testsuite.tcfg: Add tmfine01Joel Sherrill2015-03-171-0/+1
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* arm/lm3s69xx/make/custom/lm4f120-testsuite.tcfg: Add tmfine01Joel Sherrill2015-03-171-0/+1
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* preliminary Raspberry Pi Model 2 supportAlan Cudmore2015-03-166-22/+55
| | | | | | | | | | | | | | | | | This patch adds a BSP variant for the Raspberry Pi 2. You can build both variants by configuring with the option --enable-rtemsbsp="raspberrypi2 raspberrypi" For the current BSP, the only change was the peripheral register base address and the compiler options. The raspberrypi/make/custom rules were re-factored: raspberrypi.inc -- Common rules raspberrypi.cfg -- Raspberry Pi 1 specific rule/optons raspberrypi2.cfg -- Raspberry Pi 2 specific rule/options I tested hello, ticker, unlimited, and paranoia on both the Pi (Model A+) and Pi 2.
* beagle bsp: delete TIMER_FREQ, TIMER_COUNTBen Gras2015-03-141-4/+0
| | | | | | unused and poorly named (no prefix) and colliding with sp68. Closes #2302.
* rtl22xx.cfg: Remove -DNDEBUG flagJoel Sherrill2015-03-091-1/+1
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* lpc1768_mbed.cfg: Remove -DNDEBUG flagJoel Sherrill2015-03-091-1/+1
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* Add fsscandir01 variants as needed to more BSPs testsuite configurationJoel Sherrill2015-03-0612-0/+15
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* raspberrypi: Do not include default IRQ handler and BSP specific oneJoel Sherrill2015-03-061-1/+0
| | | | | | This was tripping a linker error in the dl0[12] tests. closes 2247.
* lpc1768_mbed_ahb_ram-testsuite.tcfg: Add ftp01Joel Sherrill2015-03-061-0/+1
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* lpc1768_mbed_ahb_ram.tcfg: Remove as it is a junk fileJoel Sherrill2015-03-061-7/+0
| | | | | This file does not have "-testsuite" in the name and is ignored by the build system.
* Fix a number of minor Doxygen formatting issuesJoel Sherrill2015-03-061-1/+1
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* ARM: Add BSP_START_NEEDS_REGISTER_INITIALIZATIONMartin Galvan2015-02-274-0/+139
| | | | | | | | | | | | | This patch adds the macro BSP_START_NEEDS_REGISTER_INITIALIZATION and three hooks for BSP-specific register init code to arm/shared/start.S. Said hooks are bsp_start_init_registers_core (intended for initializing the ARM core registers), bsp_start_init_registers_banked_fiq (for the FIQ mode banked registers) and bsp_start_init_registers_vfp (for the FPU registers). BSP_START_NEEDS_REGISTER_INITIALIZATION would be defined in a BSP's configure.ac (so that it appears in its bspopts.h). This patch also adds the register init code required by the TMS570. We've tested it with the tms570ls3137_hdk.cfg config and it works fine.
* ARM: Support VFP-D16Martin Galvan2015-02-201-3/+5
| | | | | | | | | This patch allows the existing FPU code to support both VFP-D16 and VFP-D32. According to ARM, writes to D32DIS are ignored for D16 so there's no need to enclose the bic instruction with an #ifdef. We tested it on a TMS570LS3137 using TI initialization code and it works fine. Signed-off by: Martin Galvan <martin.galvan@tallertechnologies.com>
* score: Add _CPU_SMP_Prepare_start_multitasking()Sebastian Huber2015-02-171-0/+5
| | | | Update #2268.
* lpc1768_mbed_ahb_ram_eth-testsuite.tcfg: Add ftp01Joel Sherrill2015-02-131-0/+1
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* lpc1768_mbed-testsuite.tcfg: Add ftp01Joel Sherrill2015-02-131-0/+1
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* arm/tms570: sci context has to be writable because it holds state variable.Pavel Pisa2015-02-042-4/+4
| | | | | | | | | | | | | | The structure tms570_sci_context holds state variable tx_chars_in_hw which holds if and how many characters (in the optional FIFO support for some Ti SCIs) are submitted into hardware. When field is not writable then code breaks when RTEMS is build for Flash area. The problem found and analyzed by Martin Galvan from tallertechnologies. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* stm32f4/.../stm32f105rc-testsuite.tcfg: Add more testsJoel Sherrill2015-01-231-0/+1
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* lpc24xx/.../lpc23xx_tli800-testsuite.tcfg: Add more testsJoel Sherrill2015-01-231-0/+7
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* lpc24xx/.../lpc2362-testsuite.tcfg: Add more testsJoel Sherrill2015-01-231-0/+2
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* lm3s69xx/.../lm3s6965-testsuite.tcfg: Add more testsJoel Sherrill2015-01-231-0/+1
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* lm3s69xx/.../lm3s3749-testsuite.tcfg: Add more testsJoel Sherrill2015-01-231-0/+2
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* bsp/altera-cyclone-v: Use proper free functionSebastian Huber2015-01-231-1/+1
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