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* arm/xilinx_zynq: ensure that cache is cleaned and MMU disabled when ↵Pavel Pisa2016-10-021-0/+35
| | | | | | | | | initialization starts. The u-boot loader enables the MMU plus the data and instruction caches in some versions which results in RTEMS boot failure. Closes #2774.
* Multiple bsp_specs: Change *(old_endfile) to %(old_endfile)Joel Sherrill2015-05-211-1/+1
| | | | | | Fix typo. closes 2345.
* Update bug report URLSebastian Huber2014-12-051-1/+1
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* bsps/arm: Add .nocache sectionSebastian Huber2014-11-273-1/+13
| | | | | This section can be use to provide a cache coherent memory area via rtems_cache_coherent_add_area().
* bsps/arm: Enable L2C for Cortex-A9 MPCore BSPsSebastian Huber2014-11-204-5/+46
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* bsps/arm: L2C 310 add compile time checksSebastian Huber2014-11-201-1/+3
| | | | Simplify initialization. Replace some assert() with fatal errors.
* bsps/arm: L2C 310 rename BSP_ARM_L2CC_BASESebastian Huber2014-11-201-1/+1
| | | | Rename BSP_ARM_L2CC_BASE to BSP_ARM_L2C_310_BASE.
* bsp/xilinx-zynq: Add Cadence I2C bus driverSebastian Huber2014-11-206-0/+645
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* bsp/xilinx-zynq: Add zync_clock_cpu_1x()Sebastian Huber2014-11-203-2/+14
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* bsp/xilinx-zynq: Rename BSP_ARM_A9MPCORE_UARTCLKSebastian Huber2014-11-202-5/+5
| | | | | Rename BSP_ARM_A9MPCORE_UARTCLK to ZYNQ_CLOCK_UART since this clock has nothing to do with the Cortex-A9 MPCore.
* bsp/xilinx-zynq: Adjust BSP_ARM_A9MPCORE_PERIPHCLKSebastian Huber2014-11-201-1/+1
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* bsps: Fix build errorSebastian Huber2014-09-182-5/+0
| | | | Fix build error introduced in f535fe5311978af53635c2da8e5cb10ef9d78802.
* bsps/arm: Add a9mpcore_clock_initialize_early()Sebastian Huber2014-09-101-0/+2
| | | | | This is necessary to use the CPU counter converter even in case no clock driver is present, e.g. in tmcontext01.
* bsps/arm: Do not build unused fileSebastian Huber2014-09-081-1/+0
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* Regenerate all preinstall.am files.Chris Johns2014-08-291-3/+3
| | | | | With this patch the preinstall.am files are in a set order and not dependent on now perl implements a hash.
* Regenerate all preinstall.am files.Joel Sherrill2014-08-281-7/+7
| | | | | Apparently, at some point automake output changed and these were not updated.
* bsps/arm: Define ARM_CP15_TEXT_SECTIONSebastian Huber2014-06-062-0/+4
| | | | | Define ARM_CP15_TEXT_SECTION to BSP_START_TEXT_SECTION so that the start code is in the right section.
* bsp/zynq: Add BSP_ZYNQ_RAM_LENGTH to allow a user to override the RAM length.Chris Johns2014-05-221-10/+13
| | | | | The Zynq BSPs can be used with varations of hardware such as memory size. This option lets you set a length.
* bsps/zynq: Add BSP_ARM_A9MPCORE_UARTCLK to set the UART clock rate.Chris Johns2014-05-222-1/+8
| | | | | This value can be found the xparameters.h file generated by the Xilinx tools.
* Change all references of rtems.com to rtems.org.Chris Johns2014-03-2111-11/+11
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* libbsp/xilinx-zynq: Share handling for ARM cache controller L2C-310Ralf Kirchner2014-03-133-988/+4
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* bsp/xilinx-zynq: Add arm-errata.h and arm-release-id.hRalf Kirchner2014-03-132-0/+10
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* score: Add RTEMS_FATAL_SOURCE_BSPSebastian Huber2014-02-192-12/+0
| | | | | | Merge RTEMS_FATAL_SOURCE_BSP_GENERIC and RTEMS_FATAL_SOURCE_BSP_SPECIFIC into new fatal source RTEMS_FATAL_SOURCE_BSP. This makes it easier to figure out the code position given a fatal source and code.
* score: Add CPU counter supportSebastian Huber2014-02-141-0/+1
| | | | | | | | | Add a CPU counter interface to allow access to a free-running counter. It is useful to measure short time intervals. This can be used for example to enable profiling of critical low-level functions. Add two busy wait functions rtems_counter_delay_ticks() and rtems_counter_delay_nanoseconds() implemented via the CPU counter.
* bsps/arm: Use Global Timer for Cortex-A9 MPCoreSebastian Huber2014-02-101-0/+2
| | | | | | Use the Global Timer for the Cortex-A9 MPCore clock driver instead of the Private Timer. This enables a consistent nanoseconds since last context switch value across all processors.
* bsp/xilinx_zynq: Support configuraton of memory map. Remove SMP variants.Chris Johns2014-02-0216-149/+89
| | | | | | | | | | Generate a linker command file from configure letting the user override the defaults to suite their custom needs. Refer to configure.ac for the details. Remove the SMP variants and let --enable-smp control if a BSP is built for SMP. Make USE_FAST_IDLE 1 only for the realview qemu BSP.
* sptests: Refactor sp09 into sppartition_err01 and sp09.Mandar Juvekar2014-01-021-0/+4
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* arm_xilinx-zynq: added new doxygenDaniel Ramirez2013-12-226-90/+261
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* arm/a9mpcore: Add support to get the clock via a weak linkage function.Chris Johns2013-12-191-1/+2
| | | | | | This allows an application to provide a localised clock freq with needing to go down the BSP opts path. This is important with the Zynq where the Xilinx tools generate the frequency.
* arm/zynq: Add support for application supplied MMU tables.Chris Johns2013-12-193-31/+63
| | | | | Users can provide a zynq_setup_mmu_and_cache function that sets up the MMU. The Zynq's PL logic means users can vary the MMU.
* arm/xilinx__zynq: Support application based clock freq.Chris Johns2013-12-101-2/+110
| | | | | | | Provide a weak call to a clock freq routine to allow the application to supply the freq defined in the Xilinx generated source. Add code to calculate the baud rate.
* arm/xilinx_zynq: Add bsp_translation_table_end to the linker script.Chris Johns2013-12-101-0/+1
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* bsps/arm: Add ARMV7_CP15_START_DEFAULT_SECTIONSSebastian Huber2013-10-271-41/+1
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* bsps/arm: ARMV7_MMU_DATA_READ_WRITE_SHAREABLESebastian Huber2013-10-271-12/+6
| | | | | Delete ARMV7_MMU_DATA_READ_WRITE_SHAREABLE and move RTEMS_SMP specific MMU attribute settings to arm-cp15.h.
* bsp/xilinx-zynq: Add cache supportRic Claus2013-08-262-2/+888
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* bsp/xilinx_zynq_zc706_smp: Add.Chris Johns2013-08-094-0/+14
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* bsp/xilinx_zynq_zc706: Add.Chris Johns2013-08-082-0/+9
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* bsp/xilinx-zynq: Provide BSP variantsRic Claus2013-07-1713-4/+96
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* bsp/xilinx-zynq: Use bsp_console_select()Sebastian Huber2013-07-171-2/+7
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* bsps/arm: Disable alignment exceptionsSebastian Huber2013-07-161-1/+1
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* bsps/arm: Rename functionSebastian Huber2013-06-241-1/+1
| | | | | | Rename arm_cp15_start_setup_translation_table_and_enable_mmu() in arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache() to emphasize that the cache is also enabled after this operation.
* bsps/arm: Set vector base address if necessarySebastian Huber2013-06-201-0/+1
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* bsp/xilinx-zynq: Use magic UART baud divisorSebastian Huber2013-06-191-2/+2
| | | | Use a baud divisor suitable for the evaluation board.
* bsp/xilinx-zynq: Do not start transmitter breakSebastian Huber2013-06-191-1/+0
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* bsp/xilinx-zynq: Use second UART for consoleSebastian Huber2013-06-181-1/+1
| | | | This is in now line with the evaluation board.
* bsps: Provide simple console selectionSebastian Huber2013-06-172-1/+4
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* bsps/arm: Add SMP supportSebastian Huber2013-05-319-14/+71
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* bsps/arm: Merge ARMv7 MMU section definitionsSebastian Huber2013-05-312-40/+13
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* bsps/arm: Add CLOCK_DRIVER_USE_FAST_IDLE optionSebastian Huber2013-05-271-0/+6
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* arm: Support VFP-D32 and NeonSebastian Huber2013-05-101-1/+1
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