rtems - RTEMS Kernel, file-systems, drivers, BSPs, samples, and testsuite.

	Commit message (Collapse)	Author	Files	Lines
2015-11-18	bsp/tms570: separate Flash variants to one which boots directly and one for ↵	Premysl Houdek	1	-4/+5
	boot loader. The default tms570ls3137_hdk variant is for building RTEMS application image starting directly from start of Flash. Variant tms570ls3137_hdk_with_loader skips 256kB at start of Flash to allow use with application loader. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
2015-11-18	bsp/tms570: use POM only when application image does not start at address 0.	Pavel Pisa	1	-0/+2
	Parameters overlay module is initialized and cleared first. It is used later to replace exception target vectors only if that is required. The application loader code with CPU and SDRAM setup code has to provide well defined pattern of instructions at addresses 0x00000000 and 0x0000001f, because only data read accesses can be processed reliably by POM. The expected instruction pattern can be seen in the next example https://github.com/hornmich/tms570ls3137-hdk-sdram/blob/master/SDRAM_SCI_configuration/source/sys_intvecs.asm Comments with detailed description of code, background and reasons for selected approach have been included in TMS570 bsp startup code. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Premysl Houdek <kom541000@gmail.com>
2015-11-18	bsp/tms570: updated reserved space for vector overlay in internal RAM	Premysl Houdek	1	-1/+2

2014-11-27	bsps/arm: Add .nocache section	Sebastian Huber	1	-0/+2
	This section can be use to provide a cache coherent memory area via rtems_cache_coherent_add_area().
2014-08-20	BSP for TMS570LS31x Hercules Development Kit from TI (TMS570LS3137)	Premysl Houdek	1	-4/+4
	Included variants: tms570ls3137_hdk_intram - place code and data into internal SRAM tms570ls3137_hdk_sdram - place code into external SDRAM and data to SRAM tms570ls3137_hdk - variant prepared for stand-alone RTEMS aplication stored and running directly from flash. Not working yet. Chip initialization code not included in BSP. External startup generated by TI's HalCoGen was used for testing and debugging. More information about TMS570 BSP can be found at http://www.rtems.org/wiki/index.php/Tms570 Patch version 2 - most of the formatting suggestion applied. - BSP converted to use clock shell - console driver "set attributes" tested. Baudrate change working Patch version 3 - more formatting changes. - removed leftover defines and test functions Todo: refactor header files (name register fields)
2014-06-10	bsp/lpc176x: New BSP	Martin Boretto	1	-7/+6

2013-04-26	bsp/lm3s69xx: New BSP variants	Eugeniy Meshcheryakov	1	-0/+0
	Add support for LM3S3749.
2012-06-15	bsps/arm: Rename linkcmds.armv7 to linkcmds.armv7m	Sebastian Huber	1	-1/+1

2012-06-12	bsps: Replace NIRVANA region	Sebastian Huber	1	-1/+0
	Replace the "NIRVANA" region with the more verbose "UNEXPECTED_SECTIONS" region. Move the region definition into the "linkcmds.base" files.
2011-09-24	2011-09-24 Sebastian Huber <sebastian.huber@embedded-brains.de>	Sebastian Huber	1	-0/+29
	* 0001-Fixed-interrupt-handling-for-ARMv7M.patch, 0002-Fixed-system-handler-priority-register-access.patch, 0003-Disable-priority_mask-unused-for-NVIC.patch, 0004-Typo.patch, 0005-Evil-hack-for-BASEPRI-BASEPRI_MAX.patch, 0006-Evil-hack-to-increase-the-RAM-size.patch, bsp_specs, ChangeLog, clock/clock-config.c, configure.ac, console/console-config.c, console/uart.c, .cvsignore, include/bsp.h, include/.cvsignore, include/irq.h, include/lm3s69xx.h, include/uart.h, irq/irq.c, make/custom/lm3s6965.cfg, make/custom/lm3s69xx.inc, Makefile.am, README, start/start.S, startup/bspreset.c, startup/bspstart.c, startup/bspstarthook.c, startup/linkcmds.lm3s6965, timer/timer.c: New files.