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* arm/tms570: define base addresses of all TMS570LS3137 SPI interfaces.Pavel Pisa2016-10-021-1/+5
| | | | | | | | Generated header file ti_herc/reg_spi.h contains complete registers and fields set for Ti MibSPI peripheral. Care has to be taken that only TMS570_SPI1, TMS570_SPI3 and TMS570_SPI5 are of this complete multibuffer type. TMS570_SPI2 and TMS570_SPI4 have substantial part of registers removed but else they are compatible.
* bsp/tms570: update pinmux to provide support for initialization lists and ↵Pavel Pisa2016-10-022-65/+74
| | | | clear of alt outputs.
* bsp/tms570: include package balls and PINMMR registers mapping for ↵Pavel Pisa2016-10-022-0/+700
| | | | TMS570LS3135ZWT chip.
* bsp/tms570: unite code duplication in pinmux and clean SCI close per review ↵Premysl Houdek2015-11-181-0/+9
| | | | | | remarks. Signed-off-by: Premysl Houdek <kom541000@gmail.com>
* bsp/tms570: use POM only when application image does not start at address 0.Pavel Pisa2015-11-181-2/+1
| | | | | | | | | | | | | | | | | | | | | Parameters overlay module is initialized and cleared first. It is used later to replace exception target vectors only if that is required. The application loader code with CPU and SDRAM setup code has to provide well defined pattern of instructions at addresses 0x00000000 and 0x0000001f, because only data read accesses can be processed reliably by POM. The expected instruction pattern can be seen in the next example https://github.com/hornmich/tms570ls3137-hdk-sdram/blob/master/SDRAM_SCI_configuration/source/sys_intvecs.asm Comments with detailed description of code, background and reasons for selected approach have been included in TMS570 bsp startup code. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Premysl Houdek <kom541000@gmail.com>
* bsp/tms570: Pinmux support and EMAC pin definition addedPremysl Houdek2015-11-181-0/+122
| | | | Signed-off-by: Premysl Houdek <kom541000@gmail.com>
* bsp/tms570: EMAC control header file corrected and EMAC interrupt vector addedPremysl Houdek2015-11-184-232/+291
| | | | | Signed-off-by: Premysl Houdek <kom541000@gmail.com> Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* bsp/tms570: skipped 32bit field definitions and corrected single bit fieldsPremysl Houdek2015-07-2036-3298/+2641
| | | | | | | | there is no need to define access macros for field covering whole registers. In addition, BSP_FLD32 does not work right for field 32bit length. Signed-off-by: Premysl Houdek <kom541000@gmail.com>
* bsp/tms570: source changes reflecting new headers.Premysl Houdek2015-07-166-178/+130
| | | | Signed-off-by: Premysl Houdek <kom541000@gmail.com>
* bsp/tms570: New/generated header files for TMS570 SoC peripherals registers.Premysl Houdek2015-07-1636-0/+14323
| | | | | | | | | | | The header files are generated by script make_header.py. Current script's version can be found at: https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python Registers offsets and fields have been extracted from reference manual. Signed-off-by: Premysl Houdek <kom541000@gmail.com>
* TMS570: Add board reset code to bsp_resetMartin Galvan2015-03-311-8/+11
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* arm/tms570: sci context has to be writable because it holds state variable.Pavel Pisa2015-02-041-1/+1
| | | | | | | | | | | | | | The structure tms570_sci_context holds state variable tx_chars_in_hw which holds if and how many characters (in the optional FIFO support for some Ti SCIs) are submitted into hardware. When field is not writable then code breaks when RTEMS is build for Flash area. The problem found and analyzed by Martin Galvan from tallertechnologies. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* termios: Partially hide rtems_termios_ttySebastian Huber2014-10-071-0/+1
| | | | | | | Move interrupt lock to device context and expose only this structure to the read, write and set attributes device handler. This makes these device handler independent of the general Termios infrastructure suitable for direct use in printk() support.
* bsp/tms570: implemented support functions to satisfy complete tests build ↵Pavel Pisa2014-08-211-0/+62
| | | | | | | | requirements. This patch enables to build all RTEMS tests for tms570ls3137_hdk_sdram BSP variant in in default build. Debug build with --enable-rtems-debug set has succeed for samples subset of tests as well.
* BSP for TMS570LS31x Hercules Development Kit from TI (TMS570LS3137)Premysl Houdek2014-08-208-0/+647
Included variants: tms570ls3137_hdk_intram - place code and data into internal SRAM tms570ls3137_hdk_sdram - place code into external SDRAM and data to SRAM tms570ls3137_hdk - variant prepared for stand-alone RTEMS aplication stored and running directly from flash. Not working yet. Chip initialization code not included in BSP. External startup generated by TI's HalCoGen was used for testing and debugging. More information about TMS570 BSP can be found at http://www.rtems.org/wiki/index.php/Tms570 Patch version 2 - most of the formatting suggestion applied. - BSP converted to use clock shell - console driver "set attributes" tested. Baudrate change working Patch version 3 - more formatting changes. - removed leftover defines and test functions Todo: refactor header files (name register fields)