rtems - RTEMS Kernel, file-systems, drivers, BSPs, samples, and testsuite.

	Commit message (Collapse)	Author	Age	Files	Lines
*	bsp/arm: Report correct maximal cache line length for ARM Cortex-A + L2C-310.	Pavel Pisa	2016-10-02	1	-0/+4
\| \| \| \| \|	Updates #2782 Updates #2783
*	bsps/arm: L2C 310 avoid infinite loops	Sebastian Huber	2014-11-25	1	-0/+8
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*	bsps/arm: L2C 310 drop exclusive cache support	Sebastian Huber	2014-11-20	1	-71/+50
\| \| \| \|	Optimize locking.
*	bsps/arm: L2C 310 compile-time errata 588369	Sebastian Huber	2014-11-20	1	-49/+19
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*	bsps/arm: L2C 310 compile-time errata 753970	Sebastian Huber	2014-11-20	1	-71/+43
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*	bsps/arm: L2C 310 exclusive config is fatal	Sebastian Huber	2014-11-20	1	-7/+16
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*	bsps/arm: L2C 310 use l2c_310_* prefix throughout	Sebastian Huber	2014-11-20	1	-99/+99
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*	bsps/arm: L2C 310 use L2C_310_* prefix throughout	Sebastian Huber	2014-11-20	1	-232/+232
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*	bsps/arm: L2C 310 add compile time checks	Sebastian Huber	2014-11-20	1	-81/+68
\| \| \| \|	Simplify initialization. Replace some assert() with fatal errors.
*	bsps/arm: L2C 310 delete invalid link	Sebastian Huber	2014-11-20	1	-2/+0
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*	bsps/arm: L2C 310 simplify and remove white space	Sebastian Huber	2014-11-20	1	-292/+177
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*	bsps/arm: L2C 310 rename BSP_ARM_L2CC_BASE	Sebastian Huber	2014-11-20	1	-26/+26
\| \| \| \|	Rename BSP_ARM_L2CC_BASE to BSP_ARM_L2C_310_BASE.
*	bsps/arm: Fix get cache size	Sebastian Huber	2014-09-10	1	-4/+6
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*	bsps/arm: Fix invalidate instruction cache	Sebastian Huber	2014-09-10	1	-33/+2
\| \| \| \| \| \| \|	Do not invalidate the entire L2 cache since it is a uniform cache in _CPU_cache_invalidate_entire_instruction(). For consitency do not touch the L2 cache even for the range function _CPU_cache_invalidate_instruction_range().
*	bsps/arm: Change L2 cache initialization	Sebastian Huber	2014-06-06	1	-3/+1
\| \| \| \| \|	Do not touch the L1 caches since they have been initialized by the start hooks.
*	bsp/arm: Cleanup L2 cache handling	Ralf Kirchner	2014-04-17	1	-38/+7
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*	bsp/arm: Correct L2 cache enable method	Ralf Kirchner	2014-04-17	1	-53/+48
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*	bsp/arm: Add cache size methods	Ralf Kirchner	2014-04-17	1	-0/+82
\| \| \| \|	Add new methods which deliver the cache sizes of for supported cache levels.
*	bsp/arm: Add L2 cache locking	Ralf Kirchner	2014-04-17	1	-9/+34
\| \| \| \|	This level 2 cache is a shared data and instruction cache and thus needs locking.
*	bsp/arm: Remove unused cache store methods	Ralf Kirchner	2014-04-17	1	-21/+0
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*	bsp/arm: Correct cache misalignment handling	Ralf Kirchner	2014-04-17	1	-26/+54
\| \| \| \|	Correct misalignment handling and prepare for locking.
*	bsp/arm: Correct L2 cache flushing	Ralf Kirchner	2014-04-17	1	-17/+31
\| \| \| \|	Correct misalignment handling and prepare for locking.
*	bsp/arm: Remove arm erratum 764369 from L2 cache	Ralf Kirchner	2014-04-17	1	-14/+0
\| \| \| \|	Arm erratum 764369 only applies to the level 1 cache.
*	bsp/arm: Add handling for level 2 L2C-310 cache controller	Ralf Kirchner	2014-03-13	1	-0/+1515
	arm-l2c-310/cache_.h contains the handling for the L2C-310 level 2 cache controller from arm. It references the arm level 1 cache handling in the new file arm-cache-l1.h.