| Commit message (Collapse) | Author | Age | Files | Lines |
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The subdir-objects do not work currently due to BSP sources in bsps and
c and the existing build tree layout.
Update #3387.
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This patch is a part of the BSP source reorganization.
Update #3285.
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This patch is a part of the BSP source reorganization.
Update #3285.
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This was used by the not supported "make dist".
This patch is a part of the BSP source reorganization.
Update #3285.
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This patch is a part of the BSP source reorganization.
Update #3285.
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This patch is a part of the BSP source reorganization.
Update #3285.
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This option silences warning with automake-1.16.1 allowing us to
upgrade to that version.
This change has been tested with automake-1.12.6 and automake-1.16.1.
It seems version 1.16.1 configures slower than 1.12.6 for the same
source and BSP. The newer versions is 6 second slower.
Close #3387.
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A "make distclean" is not supported. So, it makes no sense to have pure
"make distclean" related stuff in the Makefile.am.
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This patch is a part of the BSP source reorganization.
Update #3285.
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This patch is a part of the BSP source reorganization.
Update #3285.
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Provide HAS_NETWORKING and HAS_SMP Automake conditionals for all BSPs.
This patch is a part of the BSP source reorganization.
Update #3285.
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This patch is a part of the BSP source reorganization.
Update #3285.
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A "make dist" is not supported. So, it makes no sense to have pure "make
dist" related stuff in the Makefile.am.
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The previous cache manager support used a single souce file
(cache_manager.c) which included an implementation header (cache_.h).
This required the use of specialized include paths to find the right
header file. Change this to include a generic implementation header
(cacheimpl.h) in specialized source files.
Use the following directories and files:
* bsps/shared/cache
* bsps/@RTEMS_CPU@/shared/cache
* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILY/start/cache.c
Update #3285.
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Define __INSIDE_RTEMS_BSD_TCPIP_STACK__ in the network interface driver
source files to avoid some build system magic.
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A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.
This has at least seven problems:
* The make preinstall step itself needs time and disk space.
* Errors in header files show up in the build tree copy. This makes it
hard for editors to open the right file to fix the error.
* There is no clear relationship between source and build tree header
files. This makes an audit of the build process difficult.
* The visibility of all header files in the build tree makes it
difficult to enforce API barriers. For example it is discouraged to
use BSP-specifics in the cpukit.
* An introduction of a new build system is difficult.
* Include paths specified by the -B option are system headers. This
may suppress warnings.
* The parallel build had sporadic failures on some hosts.
This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.
The new cpukit include directories are:
* cpukit/include
* cpukit/score/cpu/@RTEMS_CPU@/include
* cpukit/libnetworking
The new BSP include directories are:
* bsps/include
* bsps/@RTEMS_CPU@/include
* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include
There are build tree include directories for generated files.
The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.
The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.
Update #3254.
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Update #3254.
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This makes it possible to easily use
EXTRA_DIST += foobar
in fragments.
Update #3254.
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Update #3254.
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Updates #3520.
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Update #3254.
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Updates #3520.
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Updates #3250.
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Since the <tm27.h> is highly BSP-dependent and used only by the tm27
test program we must provide this header file for each BSP. Without the
preinstall build target each header file must have a unique source
header file.
Update #3254.
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This header file contained timing overhead values which are hard to
maintain.
Update #3254.
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Remove BSP-specific defaults for RTEMS_BSP_CLEANUP_OPTIONS to simplify
the BSP configuration and documentation. Change defaults to:
BSP_PRESS_KEY_FOR_RESET=0
BSP_RESET_BOARD_AT_EXIT=1
BSP_PRINT_EXCEPTION_CONTEXT=1
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Update #3239.
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Remove old ISR parameter since is not used by the clock driver shell.
Make an implementation optional.
Update #3139.
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The BSP_output_char should output a char and not mingle with high level
processing, e.g. '\n' to '\r\n' translation. Move this translation to
rtems_putc(). Remove it from all the BSP_output_char implementations.
Close #3122.
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Update #2133.
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Change bsp_interrupt_vector_enable() and bsp_interrupt_vector_disable()
to not return a status code. Add bsp_interrupt_assert() and use it to
validate the vector number in the vector enable/disable implementations.
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Move the subtraction of 1 for terminator outside of
sizeof operator.
Closes #2731.
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Closes #2873.
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Whether the board is restarted after application finish/exit
is controlled by BSP_RESET_BOARD_AT_EXIT configure option.
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It has advantage that it is designed as free-running counter
with compare registers and can easily serve for for both
timecounter and tick interrupt.
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The BSP support is divided to startup/bspsmp_api.c file where
functions required by SuperCore are defined and BCM2836 hardware
initialization part in startup/bspsmp_init.c.
Separation is done to prevent smpfatal08 test build failure.
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processing.
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Adding functionality to get board serial,
power state & clock rate
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runtime init if required.
Code works but there is problem how to setup caching for the regions
(arm_cp15_set_translation_table_entries arguments).
If ARMV7_MMU_DATA_READ_WRITE_CACHED is used then CPU
accesses are noncoherent with VideoCore and some
part of image update are not visible until pushed from
cache by other activities. If ARMV7_MMU_DATA_READ_WRITE
is used then access is extremely slow.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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error checking.
The first, mistake in buffer size computation for cache flush
and invalidate has been corrected.
GCC __attribute__( ( aligned( 64 ) ) ) should work and works for local
variables. Code ensures right stack alignment. But attribute has
to be moved to type declaration to ensure that structure size is affected
by attribute. But even this seems to not work reliably for some reason.
May it be, the stack area between frame start and end of local variable buffer
accessed during context switch or some stack prefetch during resturn
such way that some cache lines belonging to buffer are filled to cache.
Extending buffer by one more cache line padding helps there.
In the longer term perspective, buffer should be moved to some static
area or cache aligned dynamic memory allocated. Concurrent calls
to the VideoCore operations and access serialization should be added
too but problem is that some calls are required during workspace and MMU
setup so variant without need of mutex would be required as well.
Framebuffer setup code and other VideoCore calls check more
precisely for errors and do not proceed forward with incorrect
data now.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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Mudit Jain'a tree.
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based approach.
Using conditional branches to find bits is extremely inefficient
and for asynchronous delivery of different interrupt sources
lead to total confusion of branch prediction unit.
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exception table.
Exception table setup is processed by common CPU architecture support.
For ARM architecture, it can be found in the file
rtems/c/src/lib/libbsp/arm/shared/start/start.S
and ends by bsp_vector_table_copy_done label.
The actual tabel content can be found at
bsp_start_vector_table_begin
For ARMv7-A and even other variant with hypervisor mode support,
it is even not necessary to copy table to address 0 at all
because CP15 register can be used to specify alternative
table start address
arm_cp15_set_vector_base_address(&)bsp_start_vector_table_begin;
ARMv7-M have register to set exception table base as well.
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later to RO.
Enable even the first megabyte of SDRAM to be cache-able after
problems with stale cache content has been resolved by previous commit.
Because major part of application usually fits to the first
megabyte this speedups test dhrystone application by factor 40.
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