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levels.
This fix strange behavior where some stale content has been
stored in level 2 cache before RTEMS has been start from U-boot
which has reappeared after MMU enable and shadow vector
table at start of SDRAM.
Updates #2782
Updates #2783
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BSPs.
The original ARM architecture wide cache_.h is changed to dummy version
for targets not implementing/enablig cache at all.
The ARM targets equipped by cache should include
appropriate implementation.
Next options are available for now
c/src/lib/libbsp/arm/shared/armv467ar-basic-cache/cache_.h
basic ARM cache integrated on the CPU core directly
which requires only CP15 oparations
c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h
support for case where ARM L2C-310 cache controller
is used. It is accessible as mmaped peripheral.
c/src/lib/libbsp/arm/shared/armv7m/include/cache_.h
Cortex-M specific cache support
Updates #2782
Updates #2783
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The current versions of U-boot start kernel/RTEMS application image
with instruction and data caches enabled and it sets exception
base register to new address after its self-relocation.
ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
mcr p15, 0, r0, c12, c0, 0 /* Set VBAR */
Included changes in bsp_start_hook_0 restore default state to
allow RTEMS image to run after startup from newer U-boot version
on Raspberry Pi.
Clear interrupt enable registers in interrupt controller
to ensure that RTEMS starts from well defined state.
Updates #2783
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counter
timer interrupt was hard coded to 10 ms per tick.
Fix uses the setting of CONFIGURE_MICROSECONDS_PER_TICK to compute the correct start value for the counter
See for more information: http://permalink.gmane.org/gmane.os.rtems.user/22691
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Fix typo.
closes 2345.
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Update #2271.
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This patch adds a BSP variant for the Raspberry Pi 2. You can
build both variants by configuring with the option
--enable-rtemsbsp="raspberrypi2 raspberrypi"
For the current BSP, the only change was the peripheral register base
address and the compiler options.
The raspberrypi/make/custom rules were re-factored:
raspberrypi.inc -- Common rules
raspberrypi.cfg -- Raspberry Pi 1 specific rule/optons
raspberrypi2.cfg -- Raspberry Pi 2 specific rule/options
I tested hello, ticker, unlimited, and paranoia on both the Pi (Model A+)
and Pi 2.
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This was tripping a linker error in the dl0[12] tests.
closes 2247.
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This section can be use to provide a cache coherent memory area via
rtems_cache_coherent_add_area().
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Fix build error introduced in f535fe5311978af53635c2da8e5cb10ef9d78802.
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This change starts with removing the effectively empty file
timerdrv.h. The prototypes for benchmark_timer_XXX() were in
btimer.h which was not universally used. Thus every use of
timerdrv.h had to be changed to btimer.h. Then the prototypes
for benchmark_timer_read() had to be adjusted to return
benchmark_timer_t rather than int or uint32_t.
I took this opportunity to also correct the file headers to
separate the copyright from the file description comments which
is needed to ensure the copyright isn't propagated into Doxygen
output.
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Apparently, at some point automake output changed and these were
not updated.
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Rename bsp_mm_config_table to arm_cp15_start_mmu_config_table and
rename bsp_mm_config_table_size to arm_cp15_start_mmu_config_table_size
to be in line with the other names in <bsp/arm-cp15-start.h>.
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Define ARM_CP15_TEXT_SECTION to BSP_START_TEXT_SECTION so that the
start code is in the right section.
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Add a CPU counter interface to allow access to a free-running counter.
It is useful to measure short time intervals. This can be used for
example to enable profiling of critical low-level functions.
Add two busy wait functions rtems_counter_delay_ticks() and
rtems_counter_delay_nanoseconds() implemented via the CPU counter.
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Delete ARMV7_MMU_DATA_READ_WRITE_SHAREABLE and move RTEMS_SMP
specific MMU attribute settings to arm-cp15.h.
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Changes include reverting back to setting all page-table section entries
as invalid and modify mm_config_table to apply the correct memory attributes
for raspbberypi memory sections at startup. The newly added entry at mm_config_table
maps raspberrypi GPIO and other registers found at raspberrypi.h
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Add support for MMU initialization for RaspberryPi. Introduce new shared
MMU configuration table that can be used by other BSPs that call the
arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache function.
Demonstrate the use of the generic table with RaspberryPi.
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