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This support is required when newer firmware is used on
Raspberry Pi 2 boards.
Updates #2783
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BSPs.
The original ARM architecture wide cache_.h is changed to dummy version
for targets not implementing/enablig cache at all.
The ARM targets equipped by cache should include
appropriate implementation.
Next options are available for now
c/src/lib/libbsp/arm/shared/armv467ar-basic-cache/cache_.h
basic ARM cache integrated on the CPU core directly
which requires only CP15 oparations
c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h
support for case where ARM L2C-310 cache controller
is used. It is accessible as mmaped peripheral.
c/src/lib/libbsp/arm/shared/armv7m/include/cache_.h
Cortex-M specific cache support
Updates #2782
Updates #2783
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This was tripping a linker error in the dl0[12] tests.
closes 2247.
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Fix build error introduced in f535fe5311978af53635c2da8e5cb10ef9d78802.
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Add a CPU counter interface to allow access to a free-running counter.
It is useful to measure short time intervals. This can be used for
example to enable profiling of critical low-level functions.
Add two busy wait functions rtems_counter_delay_ticks() and
rtems_counter_delay_nanoseconds() implemented via the CPU counter.
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Add support for MMU initialization for RaspberryPi. Introduce new shared
MMU configuration table that can be used by other BSPs that call the
arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache function.
Demonstrate the use of the generic table with RaspberryPi.
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