| Commit message (Collapse) | Author | Files | Lines |
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Updates #3520.
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Update #3254.
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Updates #3520.
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Updates #3250.
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Since the <tm27.h> is highly BSP-dependent and used only by the tm27
test program we must provide this header file for each BSP. Without the
preinstall build target each header file must have a unique source
header file.
Update #3254.
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This header file contained timing overhead values which are hard to
maintain.
Update #3254.
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Remove BSP-specific defaults for RTEMS_BSP_CLEANUP_OPTIONS to simplify
the BSP configuration and documentation. Change defaults to:
BSP_PRESS_KEY_FOR_RESET=0
BSP_RESET_BOARD_AT_EXIT=1
BSP_PRINT_EXCEPTION_CONTEXT=1
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Update #3239.
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Pass all interrupt cells to bsp_fdt_map_intr() since some platforms use
an array to describe an interrupt.
Update #3090.
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Remove old ISR parameter since is not used by the clock driver shell.
Make an implementation optional.
Update #3139.
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The BSP_output_char should output a char and not mingle with high level
processing, e.g. '\n' to '\r\n' translation. Move this translation to
rtems_putc(). Remove it from all the BSP_output_char implementations.
Close #3122.
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Change bsp_interrupt_vector_enable() and bsp_interrupt_vector_disable()
to not return a status code. Add bsp_interrupt_assert() and use it to
validate the vector number in the vector enable/disable implementations.
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Update ticket #2891 and my GSOC project
add c/src/lib/libbsp/arm/beagle/i2c/bbb-i2c.c
modify c/src/lib/libbsp/arm/beagle/include/i2c.h
modify c/src/lib/libbsp/arm/beagle/include/bbb-gpio.h
modify c/src/lib/libcpu/arm/shared/include/am335x.h
modify c/src/lib/libbsp/arm/beagle/Makefile.am
Now can read the EEPROM by i2c, the test application link is: https://github.com/hahchenchen/GSOC-test-application
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modify c/src/lib/libbsp/arm/beagle/Makefile.am
modify c/src/lib/libbsp/arm/beagle/include/i2c.h
delete c/src/lib/libbsp/arm/beagle/misc/i2c.c
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. added a README to pwm
. added select_pwmss() to select pwmss-generic registers, as opposed
to PWM-specific registers
. added pwmss_clock_en_status(), beagle_pwmss_is_running() and pwmss_tb_clock_check()
. other API improvements
. style improvements
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This patch adapts the previously added Beaglebone PWM code from BBBIO to RTEMS.
This work was done in the context of the Google Summer of Code 2016, and further
patches will follow to improve the code quality and documentation.
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This patch adds the PWM driver code for the Beaglebone Black from BBBIO:
https://github.com/VegetableAvenger/BBBIOlib/blob/master/BBBio_lib/BBBiolib_PWMSS.c
This commit is for tracking purposes only; the next commit will adapt the code for
RTEMS.
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BSPs.
The original ARM architecture wide cache_.h is changed to dummy version
for targets not implementing/enablig cache at all.
The ARM targets equipped by cache should include
appropriate implementation.
Next options are available for now
c/src/lib/libbsp/arm/shared/armv467ar-basic-cache/cache_.h
basic ARM cache integrated on the CPU core directly
which requires only CP15 oparations
c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h
support for case where ARM L2C-310 cache controller
is used. It is accessible as mmaped peripheral.
c/src/lib/libbsp/arm/shared/armv7m/include/cache_.h
Cortex-M specific cache support
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This patch makes the following changes to the Beaglebone IRQ handling code:
- Disable support for nested interrupts.
- Detect spurious IRQs using the SPURIOUSIRQ field of the INTC_SIR_IRQ register.
- Acknowledge spurious IRQs by setting the NewIRQAgr bit of the INTC_CONTROL
register. This cleans the SPURIOUSIRQ field and allows new interrupts
to be generated.
- Improve the get_mir_reg function a bit.
Closes #2580.
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This patch fixes typo "moode".
Signed-off: Punit Vara <punitvara@gmail.com>
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Update #2408.
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Both the BeagleBoards and the BeagleBones produce identical sized binaries.
BeagleBoard Series
==================
The size of the sample executables without this option were:
text data bss dec hex filename
62616 1512 264177020 264241148 fbffffc minimum.exe
94228 1852 264145056 264241136 fbffff0 base_sp.exe
114556 1940 264124632 264241128 fbfffe8 nsecs.exe
191972 2328 264046828 264241128 fbfffe8 capture.exe
206412 1880 264032848 264241140 fbffff4 cdtest.exe
180680 2228 264058220 264241128 fbfffe8 paranoia.exe
107280 1716 264132132 264241128 fbfffe8 hello.exe
554392 5764 263680988 264241144 fbffff8 fileio.exe
97888 1852 264141396 264241136 fbffff0 ticker.exe
271728 6624 263962784 264241136 fbffff0 loopback.exe
593260 1984 263645896 264241140 fbffff4 cxx_iostream.exe
448400 12740 263779992 264241132 fbfffec pppd.exe
96224 1772 264143156 264241152 fc00000 unlimited.exe
The size of the sample executables with this option enabled were:
text data bss dec hex filename
30560 1212 264209364 264241136 fbffff0 minimum.exe
87656 1828 264151660 264241144 fbffff8 base_sp.exe
108076 1916 264131144 264241136 fbffff0 nsecs.exe
183540 2296 264055292 264241128 fbfffe8 capture.exe
197908 1856 264041384 264241148 fbffffc cdtest.exe
173976 2204 264064956 264241136 fbffff0 paranoia.exe
99752 1684 264139692 264241128 fbfffe8 hello.exe
537888 5740 263697524 264241152 fc00000 fileio.exe
91312 1828 264148004 264241144 fbffff8 ticker.exe
251360 6512 263983256 264241128 fbfffe8 loopback.exe
416176 1952 263823012 264241140 fbffff4 cxx_iostream.exe
415312 12584 263813252 264241148 fbffffc pppd.exe
89068 1740 264150344 264241152 fc00000 unlimited.exe
BeagleBone Series
=================
The size of the sample executables without this option were:
text data bss dec hex filename
62616 1512 264177020 264241148 fbffffc minimum.exe
94520 1932 264144700 264241152 fc00000 base_sp.exe
114844 2020 264124280 264241144 fbffff8 nsecs.exe
192260 2408 264046476 264241144 fbffff8 capture.exe
206708 1960 264032456 264241124 fbfffe4 cdtest.exe
180976 2308 264057860 264241144 fbffff8 paranoia.exe
107280 1716 264132132 264241128 fbfffe8 hello.exe
554688 5844 263680596 264241128 fbfffe8 fileio.exe
98180 1932 264141040 264241152 fc00000 ticker.exe
272016 6704 263962432 264241152 fc00000 loopback.exe
593260 1984 263645896 264241140 fbffff4 cxx_iostream.exe
448696 12820 263779632 264241148 fbffffc pppd.exe
96224 1772 264143156 264241152 fc00000 unlimited.exe
The size of the sample executables with this option enabled were:
text data bss dec hex filename
30560 1212 264209364 264241136 fbffff0 minimum.exe
87944 1908 264151276 264241128 fbfffe8 base_sp.exe
108364 1996 264130792 264241152 fc00000 nsecs.exe
183828 2376 264054940 264241144 fbffff8 capture.exe
198196 1936 264041000 264241132 fbfffec cdtest.exe
174264 2284 264064604 264241152 fc00000 paranoia.exe
99752 1684 264139692 264241128 fbfffe8 hello.exe
538176 5820 263697140 264241136 fbffff0 fileio.exe
91600 1908 264147620 264241128 fbfffe8 ticker.exe
251648 6592 263982904 264241144 fbffff8 loopback.exe
416176 1952 263823012 264241140 fbffff4 cxx_iostream.exe
415600 12664 263812868 264241132 fbfffec pppd.exe
89068 1740 264150344 264241152 fc00000 unlimited.exe
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Fixes #2505.
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GPIO interrupts
Currently, rtems_gpio_bsp_disable_interrupt disables the interrupts for all the
pins, not just the one that actually caused the interrupt. This patch
fixes that issue.
Closes #2497.
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Use the bsp_predriver_hook() instead.
Update #2408.
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Rename rtems_bsp_select_specific_io to rtems_gpio_bsp_select_specific_io.
Should've gone with 5c337d7. Fixes #2456.
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Closes #2435.
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flush_data_cache uses R0 directly but doesn't list it as a clobbered
register. Compiling with -O3 made this code break, since the function
that calls flush_data_cache already uses r0.
closes #2416.
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GPIO Driver Development for BeagleBone Black based on the generic GPIO API
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Fix typo.
closes 2345.
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Update #2271.
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unused and poorly named (no prefix) and colliding with sp68.
Closes #2302.
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The extra includes in console_*.c are to solve a 'no previous prototype'
warning.
Solves #2212 in trac.
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On recent u-boots, the watchdog is turned on / left enabled. The
Beaglebone Black rev. C ships with such a u-boot internally so any
application booting from it must disable the watchdog.
Therefore this change is needed to boot an RTEMS app out-of-the-box
on a BBB Rev C - otherwise the user button must be held during boot
(to bypass the stock uboot) or the internal uboot must be updated. To
allow for a better out-of-the-box experience, we just turn off the
watchdog.
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This section can be use to provide a cache coherent memory area via
rtems_cache_coherent_add_area().
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Specifically the beagleboard, beagleboard xM, beaglebone, beaglebone black.
More info on these targets: http://www.beagleboard.org/
This commit forms a basic BSP by combining Claas's work with
. new clock and irq code and definitions for
beagle targets (beagleboard and beaglebones), mostly
reused from the Minix codebase, thus making
irqs, ticks and non-polled console mode work too
. new timer code for ns timing with high timer resolution,
24MHz on the AM335X and 13MHz on the DM37XX
. select the console uart based on target at configure time
. removing all the lpc32xx-specific macros and code and
other unused code and definitions that the beagle bsp
was based on
. re-using some standard functions instead of lpc32xx versions
. fixed some whitespace problem in preinstall.am
. fixed some compile warnings
. configure MMU: set 1MB sections directly in the TTBR,
just to show the difference between cacheable RAM and
non-cacheable device memory and invalid ranges; this lets us
turn on caches and not rely on boot loader MMU configuration.
Verified to work when MMU is initially either on or off when
RTEMS gets control.
Thanks for testing, commentary, improvements and fixes to Chris Johns,
Brandon Matthews, Matt Carberry, Romain Bornet, AZ technology and others.
Signed-Off-By: Ben Gras <beng@shrike-systems.com>
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Coding done in course of GSoC2012.
Commit edited to be brought up-to-date with mainline by
Ben Gras <beng@shrike-systems.com>.
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