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* Beaglebone: Add original BBBIO PWM driverPunit Vara2016-07-041-0/+41
| | | | | | | | | This patch adds the PWM driver code for the Beaglebone Black from BBBIO: https://github.com/VegetableAvenger/BBBIOlib/blob/master/BBBio_lib/BBBiolib_PWMSS.c This commit is for tracking purposes only; the next commit will adapt the code for RTEMS.
* Beaglebone: fix missing clobber in inline assembly.Marcos Diaz2015-09-101-1/+7
| | | | | | | | flush_data_cache uses R0 directly but doesn't list it as a clobbered register. Compiling with -O3 made this code break, since the function that calls flush_data_cache already uses r0. closes #2416.
* Beagle: GPIO support (for BBB)Ketul Shah2015-08-183-1/+128
| | | | GPIO Driver Development for BeagleBone Black based on the generic GPIO API
* Replace www.rtems.com with www.rtems.orgSebastian Huber2015-03-202-2/+2
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* beagle bsp: delete TIMER_FREQ, TIMER_COUNTBen Gras2015-03-141-4/+0
| | | | | | unused and poorly named (no prefix) and colliding with sp68. Closes #2302.
* BSP for several Beagle productsBen Gras2014-11-037-1540/+282
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifically the beagleboard, beagleboard xM, beaglebone, beaglebone black. More info on these targets: http://www.beagleboard.org/ This commit forms a basic BSP by combining Claas's work with . new clock and irq code and definitions for beagle targets (beagleboard and beaglebones), mostly reused from the Minix codebase, thus making irqs, ticks and non-polled console mode work too . new timer code for ns timing with high timer resolution, 24MHz on the AM335X and 13MHz on the DM37XX . select the console uart based on target at configure time . removing all the lpc32xx-specific macros and code and other unused code and definitions that the beagle bsp was based on . re-using some standard functions instead of lpc32xx versions . fixed some whitespace problem in preinstall.am . fixed some compile warnings . configure MMU: set 1MB sections directly in the TTBR, just to show the difference between cacheable RAM and non-cacheable device memory and invalid ranges; this lets us turn on caches and not rely on boot loader MMU configuration. Verified to work when MMU is initially either on or off when RTEMS gets control. Thanks for testing, commentary, improvements and fixes to Chris Johns, Brandon Matthews, Matt Carberry, Romain Bornet, AZ technology and others. Signed-Off-By: Ben Gras <beng@shrike-systems.com>
* Added BeagleBoard BSPClaas Ziemke2014-11-037-0/+1995
Coding done in course of GSoC2012. Commit edited to be brought up-to-date with mainline by Ben Gras <beng@shrike-systems.com>.