summaryrefslogtreecommitdiffstats
path: root/c/src/lib/libbsp/arm/altera-cyclone-v/startup (follow)
Commit message (Collapse)AuthorAgeFilesLines
* bsp/altera-cyclone-v: Move MMU configuration tableSebastian Huber2014-07-012-20/+36
| | | | This makes it possible to use application specific version.
* bsp/altera-cyclone-v: Enable unified L2 cacheSebastian Huber2014-06-062-1/+12
|
* bsp/altera-cyclone-v: Move SMP supportSebastian Huber2014-06-062-47/+90
|
* bsp/altera-cyclone-v: Simplify start hooksSebastian Huber2014-06-061-120/+25
| | | | Use arm_a9mpcore_start_hook_0(). The L2 cache is now disabled.
* bsp/altera-cyclone-v: Use NOLOAD for nocache secSebastian Huber2014-06-061-1/+1
|
* bsp/altera-cyclone-v: Simplify MMU config tableSebastian Huber2014-06-061-2/+1
|
* bsps/arm: Define ARM_CP15_TEXT_SECTIONSebastian Huber2014-06-061-1/+3
| | | | | Define ARM_CP15_TEXT_SECTION to BSP_START_TEXT_SECTION so that the start code is in the right section.
* bsp/altera-cyclone-v: CleanupRalf Kirchner2014-05-281-3/+3
|
* bsp/altera-cyclone-v: Reduce size of nocache heapRalf Kirchner2014-05-282-4/+4
| | | | Network mbufs and clusters now are cached. Thus the nocache heap can get reduced to 1 MByte.
* bsp/altera-cyclone-v: Cache mbufs and clustersRalf Kirchner2014-05-281-12/+0
|
* bsp/altera-vyclone-v: Broadcast cache maintenancesRalf Kirchner2014-05-281-3/+3
|
* bsp/altera-cyclone-v: Move mbufs and network clusters to uncached RAMRalf Kirchner2014-04-301-0/+12
|
* bsp/altera-cyclone-v: Increase size of nocache region and nocache heapRalf Kirchner2014-04-302-3/+3
| | | | Increase size of nocache heap in order to be able to move mbufs and clusters of the network driver to uncached RAM
* bsp/altera-cyclone-v: CleanupRalf Kirchner2014-04-171-2/+0
|
* rtems: Rename rtems_smp_get_current_processor()Sebastian Huber2014-04-111-1/+1
| | | | | | | Rename rtems_smp_get_current_processor() in rtems_get_current_processor(). Make rtems_get_current_processor() a function in uni-processor configurations to enable ABI compatibility with SMP configurations.
* Change all references of rtems.com to rtems.org.Chris Johns2014-03-213-3/+3
|
* bsp/altera-cyclone-v: New BSPRalf Kirchner2014-03-137-0/+446
Implemented so far: - nocache heap for uncached RAM - basic timer - level 1 cache handling for arm cache controller in arm-cache-l1.h - level 2 L2C-310 cache controller - MMU - DWMAC 1000 ethernet controller - basic errata handling - smp startup for second core