summaryrefslogtreecommitdiffstats
path: root/c/src/exec/score/cpu/m68k/cpu_asm.S (unfollow)
Commit message (Collapse)AuthorFilesLines
2002-07-22Remove, moved to cpukit.Ralf Corsepius1-263/+0
2001-08-092001-08-09 Chris Johns <ccj@acm.org>Joel Sherrill1-63/+36
* cpu_asm.S: This patch was co-developed with Eric Norum <eric.norum@usask.ca>. It closes a one instruction window on some m68k CPU cores. It fixes symptoms seen as: 1) No more `interrupt handler invoked twice for a single interrupt'. 2) No more `lockup when mc68360 CPM and PIT interrupts are at different levels'. It does insert a little more overhead on machines without hardware interrupt stacks but correctness has a price.
2001-01-032001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill1-2/+2
* rtems/score/cpu.h: Added _CPU_Initialize_vectors(). * cpu_asm.S: Modify to properly dereference _ISR_Vector_table now that it is dynamically allocated.
1999-11-17Updated copyright notice.Joel Sherrill1-2/+1
1998-12-14Patch from Ralf Corsepius <corsepiu@faw.uni-ulm.de> to rename allJoel Sherrill1-0/+0
.s files to .S in conformance with GNU conventions. This is a minor step along the way to supporting automake.
1998-10-06Corrected assembly language to use constants instead of addresses.Joel Sherrill1-2/+2
Thanks to Rod Barman for this one.
1998-09-30Patch from Eric Norum <eric@skatter.USask.Ca>:Joel Sherrill1-1/+1
I found that my 68040/68360 test programs would not run even after I fixed the `wrong BSP' problem. It seems that there's a bug in the interrupt handling code for processors with hardware interrupt stacks (e.g. 68040). The wrong status register was getting pushed on the stack for the `return from exception' to call _ISR__Dispatch. This ended up making the context switch code run on the interrupt stack, so interrupt-driven context switches would always fail. I guess that no one has tried running any of the RTEMS-4.0 snapshots on a 68040 machine! Anyhow, here are the patches for 1) gen68360.cfg --- to fix the `wrong-BSP' problem. 2) m68k/cpu_asm.s --- to fix the hardware interrupt stack problem. With these patches in place, the network demo programs run on my 68040/68360 system. The paranoia program runs with no failures, defects nor flaws.
1998-06-25Coldfire support patch from David Fiddes <D.J.Fiddes@hw.ac.uk>.Joel Sherrill1-2/+46
1998-04-27Fixed spelling errors.Joel Sherrill1-3/+3
1998-04-27Fixed trace bit manipulation per requests from Eric Norum and Chris Johns.Joel Sherrill1-11/+3
Actual patch was from Eric Norum.
1998-03-25m68k software interrupt stack support from Chris Johns and Eric Norum.Joel Sherrill1-19/+30
1998-02-17updated copyright to 1998Joel Sherrill1-1/+1
1997-11-29Patch from Chris Johns to filter out the trace bit on CPU modelsJoel Sherrill1-2/+5
which have hardware support for a separate interrupt stack.
1997-10-08Fixed typo in the pointer to the license terms.Joel Sherrill1-2/+2
1997-07-10Strip the trace bit from the SR register when dispatching a thread whenJoel Sherrill1-3/+5
exiting from an ISR. This allows the trace bit to be set on a per task basis and tracing to be limited to that task.
1997-05-28Added support for context switching the data used by the gcc m68kJoel Sherrill1-0/+7
software floating point emulation code. Code implemented by Karen Sara Looney <Karen.Looney@colorado.edu> with much email assistance from Joel.
1997-04-22headers updated to reflect new style copyright notice as partJoel Sherrill1-5/+5
of switching to the modified GNU GPL.
1997-04-07added plea for someone to implement software stack switching for m68000-ishJoel Sherrill1-0/+3
cores.
1997-03-11swapped increment of _ISR_Nest_level and _Thread_Dispatch_disable_levelJoel Sherrill1-1/+1
1997-01-15fixed comments on vanilla 68000 SW interrupt stack (or the lack thereof)Joel Sherrill1-5/+0
1996-12-02Update from Chris Johns <cjohns@awa.com.au> to add better support forJoel Sherrill1-16/+7
68000 class CPUs.
1995-10-30SPARC port passes all testsJoel Sherrill1-3/+0
1995-09-29all targets compile .. tony's patches in placeJoel Sherrill1-12/+22
1995-09-19Incorporated the submission from John S. GwynneJoel Sherrill1-29/+51
<jsg@coulomb.eng.ohio-state.edu> of the rest of the 68000-ish support for interrupt handling and bfffo support, the two BSPs he submitted (efi68k and efi332), and SGI Irix 5.3 host support.
1995-06-07incorporated mc68302 supportJoel Sherrill1-7/+19