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* 2000-10-18 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-10-181-15/+12
| | | | | | | * cpu_asm.S, rtems/score/cpu.h: Modified to better support multilibing. These changes result in the code being able to compile with the default gcc settings. It is not functional in this configuration but does compile.
* Update from Philip Quaife <rtemsdev@qs.co.nz> that was hand-merged.Joel Sherrill2000-07-171-1/+51
| | | | | | | | | | This update addresses the following: + the ISR enable/disable/flash macros now work with old gcc versions. + the UI CCR bits are now masked since other example code did so + _ISR_Dispatch disables interrupts during call setup Together these removed the instabilities he was seeing.
* Interrupt stack is allocated in _ISR_Handler_initialization notJoel Sherrill2000-07-031-1/+1
| | | | _Interrupt_Manager_initialization.
* Changed extra_system_initialization_stack to extra_mpci_receive_server_stackJoel Sherrill2000-07-031-1/+1
| | | | to be consistent with other ports.
* This is the initial addition of the port of RTEMS to theJoel Sherrill2000-06-296-0/+1319
Hitachi H8 family. This port was done by Philip Quaife <philip@qs.co.nz> of Q Solutions and sponsored by Comnet Technologies Ltd. The port was done based on RTEMS 3.5.1 to a Hitach H8300H. The port was updated to RTEMS 4.5 style Makefiles/configure by Joel Sherrill <joel@OARcorp.com>. While doing this Joel added support for the h8300-rtems to binutils, gcc, newlib, and gdb. NOTE: Philip submitted a BSP for a Hitachi evaluation board which is being merged as a separate entity.