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2019-11-19bsp/imx7: Rename linker command fileSebastian Huber1-0/+0
This BSP family uses only one linker command file. Use the standard name. Update #3818.
2019-11-19bsp/altcycv_devkit: Rename linker command fileSebastian Huber1-0/+0
This BSP family uses only one linker command file. Use the standard name. Update #3818.
2019-11-18bsp/atsamv: Fix warningSebastian Huber1-1/+0
2019-11-14bsp/t32mppc: Rename linker command fileSebastian Huber1-0/+0
This BSP family uses only one linker command file. Use the standard name. Update #3818.
2019-11-14bsp/beagle: Rename linker command fileSebastian Huber1-0/+0
This BSP family uses only one linker command file. Use the standard name. Update #3818.
2019-11-14bsp/riscv: Fix format and warningsSebastian Huber2-45/+27
Update #3785.
2019-11-14bsp/riscv: Fix use of uninitialized integerSebastian Huber1-6/+1
2019-11-14bsp/riscv: riscv_get_core_frequency()Sebastian Huber2-43/+23
Always provide this function. Return 0 by default. Fix formatting. Simplify function. Update #3785.
2019-11-14bsp/gumstix: Fix warningSebastian Huber1-0/+1
2019-10-31bsps/arm: Add support for small pages MMUSebastian Huber3-30/+101
The small page MMU support reduces the granularity for memory settings through the MMU from 1MiB sections to 4KiB small pages. Enable it by default on the realview_pbx_a9_qemu BSP.
2019-10-30bsps/riscv: UART - Read reg-shift from DTB to properly set/get registersHesham Almatary1-2/+13
2019-10-27riscv: Add new BSP cfg variants to be built with llvm/clangHesham Almatary8-0/+112
2019-10-27riscv: Add new offending input sections to the linker scriptHesham Almatary1-0/+5
2019-10-27riscv: Add NOLOAD directive to the .work sectionHesham Almatary1-1/+1
ld.lld defaults .work to PROGBITS otherwise
2019-10-27riscv: Address differences in the linkerscript between GNU LD and LLVM/LLDHesham Almatary1-51/+51
LLVM/LLD does not support STARTUP and ALIGN_WITH_INPUT directives that GNU LD support. INPUT and ALIGN(8) are supported by LLVM/LLD and can replace the unsupported STARTUP/ALIGN_WITH_INPUT directives. The commit conditionally adds the supported directive that linkers can understand depending on the toolchain used to compile RTEMS i.e., clang or gcc. Clang is assumed to use LLD by default.
2019-10-27riscv: Generate linkcmds.base from the shared linkcmds.base.inHesham Almatary1-0/+0
This commit moves the existing linkcmds.base to linkcmds.base.in in order to make it configurable by autotools.
2019-10-23bsp/xilinx-zynq: Simplify linkcmds configSebastian Huber1-3/+3
Use NULL-pointer protection also for Qemu variant. Do all calculations in the linker command file. This is a preparation for the new build system.
2019-10-23bsp/xilinx-zynqmp: Simplify linkcmds configSebastian Huber1-3/+3
Do all calculations in the linker command file. This is a preparation for the new build system.
2019-10-23bsp/atsam: Use PIO for SC16IS752.Christian Mauderer2-21/+26
This allows to mix SC16IS752 chips with other interrupts.
2019-10-23bsp/atsam: Add additional PIO helper.Christian Mauderer2-0/+59
2019-10-23bsps/atsam: Improve case for level triggered IRQs.Christian Mauderer1-11/+15
For level triggered interrupts currently the handler would have been called two times (assuming no one cleared the mask in a handler which would have been bad because the handler couldn't process all other that got cleared by accident). This patch allows the handler only to return if nothing is left to do.
2019-10-23riscv: add freedom E310 Arty A7 bspPragnesh Patel8-6/+314
Added support for Sifive Freedom FE310 soc on Arty A7 FPGA board. Update #3785. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2019-10-19arm/beanglebone: Fix i2c build error.Chris Johns1-1/+1
2019-10-01bsp/erc32: Improve pseudo-SMP supportSebastian Huber1-0/+84
Add support for _SMP_Send_message() to the own processor. This is required by the smpmulticast01 test program.
2019-09-20rtems: Add rtems_interrupt_server_entry_move()Sebastian Huber1-0/+17
The use case for this function is the libbsd. In FreeBSD, the interrupt setup and binding to a processor is done in two steps. Message based interrupts like PCIe MSI and MSI-X interrupts can be implemented through interrupt server entries. They are setup at the default interrupt server and may optionally move to an interrupt server bound to a specific processor.
2019-09-19bsps/beagle: register i2c device at initializationVijay Kumar Banerjee3-13/+24
2019-09-06record: Allow tracing of ISR disable/enableSebastian Huber1-3/+5
Directly use the CPU port API in boot_card() to allow tracing of the higher level interrupt disable/enable routines, e.g. _ISR_Local_disable() and _ISR_Local_enable(). Currently, there is no configuration option to enable this. Below is a patch. It may be used to investigate some nasty low level bugs in the system. Update #3665. diff --git a/cpukit/include/rtems/score/isrlevel.h b/cpukit/include/rtems/score/isrlevel.h index c42451d010..46d361ddc2 100644 --- a/cpukit/include/rtems/score/isrlevel.h +++ b/cpukit/include/rtems/score/isrlevel.h @@ -40,6 +40,10 @@ extern "C" { */ typedef uint32_t ISR_Level; +uint32_t rtems_record_interrupt_disable( void ); + +void rtems_record_interrupt_enable( uint32_t level ); + /** * @brief Disables interrupts on this processor. * @@ -56,8 +60,7 @@ typedef uint32_t ISR_Level; */ #define _ISR_Local_disable( _level ) \ do { \ - _CPU_ISR_Disable( _level ); \ - RTEMS_COMPILER_MEMORY_BARRIER(); \ + _level = rtems_record_interrupt_disable(); \ } while (0) /** @@ -72,10 +75,7 @@ typedef uint32_t ISR_Level; * _ISR_Local_disable(). */ #define _ISR_Local_enable( _level ) \ - do { \ - RTEMS_COMPILER_MEMORY_BARRIER(); \ - _CPU_ISR_Enable( _level ); \ - } while (0) + rtems_record_interrupt_enable( _level ) /** * @brief Temporarily enables interrupts on this processor. @@ -98,9 +98,8 @@ typedef uint32_t ISR_Level; */ #define _ISR_Local_flash( _level ) \ do { \ - RTEMS_COMPILER_MEMORY_BARRIER(); \ - _CPU_ISR_Flash( _level ); \ - RTEMS_COMPILER_MEMORY_BARRIER(); \ + rtems_record_interrupt_enable( _level ); \ + _level = rtems_record_interrupt_disable(); \ } while (0) /
2019-08-12arm/tlb: Fix the MP affinity check to invalidate ASIDs.Chris Johns1-1/+9
- The TI's CortexA7 MP MPIDR register returns 0 Updates #3760
2019-08-12arm/raspberry: Set the workspace based on the mailbox version.Chris Johns3-26/+135
- Update the linkcmd file to support configure settings - Set the workspace size based on the revision value
2019-08-12libdl/debugger: Fix the broken list delete when unloading an object module.Chris Johns1-0/+0
Closes #3777
2019-08-07bsp/beagle: Add nocache sectionVijay Kumar Banerjee2-3/+9
Closes #3780
2019-08-03bsps/beagle: Remove dead code from GPIO.Christian Mauderer1-133/+0
Remove static stuff that is never used.
2019-07-31arm/beagle: Add libdebugger support.Chris Johns3-0/+775
- Port the jbang code from C++ to C to enable DBGEN. - Hook the libdebugger ARM backend support to return the base address of the debug register set.
2019-07-31arm: Select the TLB invalidate based on the core's Id variant.Chris Johns1-6/+10
Closes #3760
2019-07-30arm/raspberrypi: Fix linker mapSebastian Huber2-27/+9
Add NULL-pointer protection. Make MMU table read-only. Move vector table to start section. Close #3774.
2019-07-30Add and use THREAD_DEFAULT_MAXIMUM_NAME_SIZESebastian Huber1-1/+1
2019-07-26bsps/arm: Move HYP to SVC change to start.SSebastian Huber2-78/+40
This fixes the corruption of r3 by the call to bsp_start_arm_drop_hyp_mode(). Moving the code makes it easier to review changes in start.S. Close #3773.
2019-07-26bsps/arm: Move register init to start.SSebastian Huber2-109/+55
This makes it easier to review changes in start.S. Update #3773.
2019-07-26bsps/arm: Remove register init for ARMv7-MSebastian Huber1-12/+1
There are no known ARMv7-M chips with a dual lockstep mode. Update #3773.
2019-07-05bsps: Regenerate headers.amSebastian Huber32-0/+116
Update #3269.
2019-06-29bsp/beagle: Partial re-write of I2C driver.Christian Mauderer3-395/+370
The old driver worked well for EEPROMS with the RTEMS EEPROM driver. But it had problems with a lot of other situations. Although it's not a direct port, the new driver is heavily modeled after the FreeBSD ti_i2c driver. Closes #3764.
2019-06-28arm: Return the current handler from arm_cp15_set_exception_handlerChris Johns1-2/+7
Closes #3762
2019-06-27bsp/motorola_powerpc: Fix linker command fileSebastian Huber1-1/+2
Fix the __size symbol value to reflect the total size of the bootloader. This prevents a bootloader crash with application images above a certain threshold (e.g. fileio sample program). Update #3727.
2019-06-21bsp/atsam: Enable configuration of SDRAMC_LPRSebastian Huber3-7/+13
2019-06-18atsam: Add ATSAM_POWER_WAIT_MODESebastian Huber2-3/+210
2019-06-18atsam: Enable fast startup via RTC alarmSebastian Huber1-0/+6
2019-06-18bsp/atsam: Use proper APISebastian Huber1-4/+1
2019-06-13bsp/atsam: Do not disable the WDTSebastian Huber2-4/+0
The watchdog timer (WDT) can be configure only once. Do not touch it in the BSP since the application may want to use it.
2019-06-13bsp/atsam: Improve RTC power driverSebastian Huber2-10/+25
Accept a time interval up to 24h.
2019-06-12bsp/atsam: Fix RTC_SetTimeAlarm()Sebastian Huber1-7/+13
Set the alarm time according to the note in the datasheet.
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