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Move _ISR_Handler() to a separate file since it is now only used if a handler
is installed by _CPU_ISR_install_raw_handler().
Statically initialize the traps for external interrupts to use the new
_SPARC_Interrupt_trap() which directly dispatches the interrupt handlers
installed by rtems_interrupt_handler_install() via the BSP-provided
_SPARC_Interrupt_dispatch().
Since the trap table is now fully statically initialized, there is no longer a
dependency on the Cache Manager in the default configuration.
Update #4458.
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Add bsp_interrupt_handler_dispatch_unchecked() as an alternative to
bsp_interrupt_handler_dispatch(). It may be used if the caller can ensure that
the vector number is valid.
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Avoid using set_vector() which depends on _ISR_Vector_table(). Prepare for a
statically initialized trap table.
Update #4458.
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Statically initialize the trap table in start.S to jump to _SPARC_Bad_trap()
for all unexpected traps. This enables a proper RTEMS fatal error handling
right from the start. Do not rely on the stack and register settings which
caused an unexpected trap. Use the ISR stack of the processor to do the fatal
error handling. Save the full context which caused the trap. Fatal error
handler may use it for error logging.
Unify the _CPU_Exception_frame_print() implementations and move it to cpukit.
Update #4459.
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This makes it easier to review start.o and set break points to trap table
entries. This change was checked by inspecting the trap table in start.o with
objdump.
Update #4458.
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Fix an off by one error.
Update #3269.
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Change the default value of BSP_INTERRUPT_VECTOR_COUNT so that no interrupt
vectors are supported and all related directives return RTEMS_INVALID_ID.
Update #3269.
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This define is no longer used.
Update #3269.
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Use BSP_INTERRUPT_VECTOR_COUNT instead of BSP_INTERRUPT_VECTOR_MAX.
Update #3269.
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Replace it with BSP_INTERRUPT_VECTOR_COUNT.
Update #3269.
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Assert BSP_INTERRUPT_VECTOR_MAX + 1 == BSP_INTERRUPT_VECTOR_COUNT.
After building all BSPs with this patch, BSP_INTERRUPT_VECTOR_MAX can be
removed and replaced by BSP_INTERRUPT_VECTOR_COUNT. The
BSP_INTERRUPT_VECTOR_COUNT allows a default implementation which supports no
interrupt vector at all. Using COUNT instead of MAX may avoid some
interpretation issues, for example is the maximum value a valid vector number
or not.
Update #3269.
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Remove BSP_INTERRUPT_VECTOR_MIN and unconditionally let interrupt vector
numbers start with zero.
The BSP_INTERRUPT_VECTOR_MIN == 0 invariant was tested by the previous commit
and building all BSPs.
Update #3269.
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After building all BSPs with this patch, this BSP-specific define can be
removed to simplify the implementation.
Update #3269.
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Update #3269.
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This BSP uses a customized implementation of the interrupt extension API. It
was the only BSP which defined BSP_INTERRUPT_VECTOR_MIN to a value other than
zero. Define it to zero and use a custom bsp_interrupt_is_valid_vector()
function instead.
Update #3269.
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Remove the support for BSP_INTERRUPT_NO_HEAP_USAGE. This was only used
by one BSP and provides no real benefit.
Update #3269.
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Close #4461.
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Fix compile error with RTEMS_DRVMGR_STARTUP = True.
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Closes #4455
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Change license to BSD-2-Clause according to file history and
re-licensing agreement.
Update #3053.
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Callers usually want to output a character.
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This is already done in rtems_putc().
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Get rid of the hack to output into the idle stack during the early system
initialization. This fixes also a couple of test program failures which fail
due to missing output.
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Replace the global variable ambapp_plb with a function to allow an automatic on
demand initialization.
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Make the memory allocations in ambapp_scan() customizable via the new struct
ambapp_context parameter which generalizes the memory copy handler.
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Directly initialize the memory in the start sequence defined by start.S
instead of using a system initialization handler. This avoids using the
global variable rdb_start which used a memory location which was shared
with _ERC32_MEC_Timer_Control_Mirror. This change makes it possible to
use _Memory_Allocate() even before the system initialization is started.
Change license to BSD-2-Clause according to file history and
re-licensing agreement.
Update #3053.
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Initialize the stacks for all processors in one place. Do not rely on
Per_CPU_Control::interrupt_stack_high and directly use the statically
allocated interrupt stack area.
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Initialize the stacks in start.S in one place and identical to
_CPU_Context_Initialize().
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Remove the support to load the data section and rely on the boot loader. The
code is an artifact from the old erc32 days, when we would boot and execute
from ROM and the .data had to be copied over to RAM. With leon1/2/3, this is
not used anymore as a boot loader is made from the RAM image using a custom
tool (mkprom).
In SMP configurations, this support was also broken since LEON3_Boot_Cpu
(in the data section due to the -1 initialization value) was used quite
early in the start sequence.
If the data copy is really necessary, then an application can still add this
step as a very early system initialization step, since boot_card() and the
system initialization loop does not use initialized read-write data (only
read-only and BSS data). However, the SMP startup would still not work in this
case. A boot loader is a better place to load the sections.
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The a72 BSPs are identical to the a53 BSPs just changing a53 to a72.
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Update #4202.
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Also updated licenses.
Closes #4400
Updates #3899
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Currently, the AArch64 BSPs have a hard time running on real hardware
without building the toolchain and the bsps with -mstrict-align in
multiple places. Configuring the MMU on these chips allows for unaligned
memory accesses for non-device memory which avoids requiring strict
alignment in the toolchain and in the BSPs themselves.
In writing this driver, it was found that the synchronous exception
handling code needed to be rewritten since it relied on clearing SCTLR_EL1 to
avoid thread stack misalignments in RTEMS_DEBUG mode. This is now
avoided by exactly preserving thread mode stack and flags and the new
implementation is compatible with the draft information provided on the
mailing list covering the Exception Management API.
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Ensure that cache functions are flagged as usable by the generic cache
implementation code.
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This fixes a bug where addresses were not being aligned correctly.
Addresses used in cache functions are now aligned consistently using
RTEMS_ALIGN_DOWN.
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Break out system register definitions and accessors so that they're
usable by other parts of RTEMS.
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Closes #4r37.
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Closes #4438.
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