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* bsp/shared/clock: Reset Clock_driver_isrs to correct valueJan Sommer2020-04-031-1/+1
| | | | | | | CLOCK_DRIVER_ISRS_PER_TICK is the configuration define, CLOCK_DRIVER_ISRS_PER_TICK_VALUE is the actual value of ISRS per clock tick, therefore use this one to reset the Clock_driver_isrs after each tick.
* bsps: Remove legacy interrupt API from defaultSebastian Huber2020-03-131-1/+0
| | | | | This fixes linker issues on the powerpc/virtex4 and powerpc/virtex5 BSPs.
* bsps/clock: Use _SMP_Get_processor_maximum()Sebastian Huber2020-02-251-1/+1
| | | | | | | Use a specific test to enable the fast idle mode instead of using the rtems_configuration_is_smp_enabled() workaround. Update #3876.
* drvmgr: Fix determination of prefix in grlib uart driverDennis Pfau2020-02-201-1/+1
| | | | | drvmgr_get_dev_prefix returns 0 if a prefix was found. Therefore the if condition needs to check for 0, i.e. DRVMGR_OK.
* libchip/ns16550: Allow user calculate baud divisorG S Niteesh2020-02-161-0/+2
| | | | | | | | This patch will allow the user to pass a function to calculate the baud divisor. This will allow for more flexibility, since for some BSPs like raspberrypi, the calculation of baud divisor is different from what is in the current driver.
* config: Add CONFIGURE_DIRTY_MEMORYSebastian Huber2020-02-061-13/+0
| | | | | | | Replace the BSP_DIRTY_MEMORY BSP option with a CONFIGURE_DIRTY_MEMORY configuration option. Update #3843.
* Use RTEMS_SYSINIT_ORDER_LAST_BUT_5Sebastian Huber2020-02-041-1/+1
| | | | | | | | Use RTEMS_SYSINIT_ORDER_LAST_BUT_5 instead of RTEMS_SYSINIT_ORDER_LAST to allow applications and support functions to place system initialization handlers behind the standard handlers. Update #3838.
* bsps: Rework work area initializationSebastian Huber2020-02-042-18/+39
| | | | | | | | | | | | | | | | | | | | The work area initialization was done by the BSP through bsp_work_area_initialize(). This approach predated the system initialization through the system initialization linker set. The workspace and C program heap were unconditionally initialized. The aim is to support RTEMS application configurations which do not need the workspace and C program heap. In these configurations, the workspace and C prgram heap should not get initialized. Change all bsp_work_area_initialize() to implement _Memory_Get() instead. Move the dirty memory, sbrk(), per-CPU data, workspace, and malloc() heap initialization into separate system initialization steps. This makes it also easier to test the individual initialization steps. This change adds a dependency to _Heap_Extend() to all BSPs. This dependency will be removed in a follow up change. Update #3838.
* bsps/irq: fix resource leak in irq-server.cGedare Bloom2020-01-031-0/+1
| | | | | | Resource leak identified by Coverity (CID 1456675). The value of instances is leaked in case some but not all irq servers are created. It should be stored in bsp_interrupt_server_instances.
* rtems: Add and use rtems_object_get_local_node()Sebastian Huber2019-12-133-3/+3
| | | | Update #3841.
* mpci: Simplify MPCI configurationSebastian Huber2019-12-111-18/+25
| | | | Use watchdog for shared memory driver instead of a Classic API Timer.
* clock: Simplify driver initializationSebastian Huber2019-12-112-29/+3
| | | | | | Use a system initialization handler instead of a legacy IO driver. Update #3834.
* rtems: Add rtems_interrupt_server_entry_move()Sebastian Huber2019-09-201-0/+17
| | | | | | | | | The use case for this function is the libbsd. In FreeBSD, the interrupt setup and binding to a processor is done in two steps. Message based interrupts like PCIe MSI and MSI-X interrupts can be implemented through interrupt server entries. They are setup at the default interrupt server and may optionally move to an interrupt server bound to a specific processor.
* record: Allow tracing of ISR disable/enableSebastian Huber2019-09-061-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Directly use the CPU port API in boot_card() to allow tracing of the higher level interrupt disable/enable routines, e.g. _ISR_Local_disable() and _ISR_Local_enable(). Currently, there is no configuration option to enable this. Below is a patch. It may be used to investigate some nasty low level bugs in the system. Update #3665. diff --git a/cpukit/include/rtems/score/isrlevel.h b/cpukit/include/rtems/score/isrlevel.h index c42451d010..46d361ddc2 100644 --- a/cpukit/include/rtems/score/isrlevel.h +++ b/cpukit/include/rtems/score/isrlevel.h @@ -40,6 +40,10 @@ extern "C" { */ typedef uint32_t ISR_Level; +uint32_t rtems_record_interrupt_disable( void ); + +void rtems_record_interrupt_enable( uint32_t level ); + /** * @brief Disables interrupts on this processor. * @@ -56,8 +60,7 @@ typedef uint32_t ISR_Level; */ #define _ISR_Local_disable( _level ) \ do { \ - _CPU_ISR_Disable( _level ); \ - RTEMS_COMPILER_MEMORY_BARRIER(); \ + _level = rtems_record_interrupt_disable(); \ } while (0) /** @@ -72,10 +75,7 @@ typedef uint32_t ISR_Level; * _ISR_Local_disable(). */ #define _ISR_Local_enable( _level ) \ - do { \ - RTEMS_COMPILER_MEMORY_BARRIER(); \ - _CPU_ISR_Enable( _level ); \ - } while (0) + rtems_record_interrupt_enable( _level ) /** * @brief Temporarily enables interrupts on this processor. @@ -98,9 +98,8 @@ typedef uint32_t ISR_Level; */ #define _ISR_Local_flash( _level ) \ do { \ - RTEMS_COMPILER_MEMORY_BARRIER(); \ - _CPU_ISR_Flash( _level ); \ - RTEMS_COMPILER_MEMORY_BARRIER(); \ + rtems_record_interrupt_enable( _level ); \ + _level = rtems_record_interrupt_disable(); \ } while (0) /
* Add and use THREAD_DEFAULT_MAXIMUM_NAME_SIZESebastian Huber2019-07-301-1/+1
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* bsps: Fix warnings in grethSebastian Huber2019-05-272-7/+7
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* score: Simplify _SMP_Multicast_action()Sebastian Huber2019-05-201-2/+23
| | | | | | Move resposibility to disable thread dispatching to the caller of _SMP_Multicast_action(). Using an interrupt disable for this purpose is questionable.
* score: Add _SMP_Broadcast_action()Sebastian Huber2019-05-201-2/+2
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* bsps: Always build generic interrupt supportSebastian Huber2019-05-162-0/+59
| | | | | | | This makes it possible to write tests for the generic interrupt controller support. Update #3269.
* score: Use processor mask in _SMP_Multicast_actionSebastian Huber2019-04-121-2/+2
| | | | Processor_mask is the internal data type to deal with processor sets.
* score: Rename _SMP_Get_processor_count()Sebastian Huber2019-04-111-2/+4
| | | | | | | Rename _SMP_Get_processor_count() in _SMP_Get_processor_maximum() to be in line with the API level rtems_scheduler_get_processor_maximum(). Update #3732.
* rtems: Add rtems_scheduler_get_processor_maximum()Sebastian Huber2019-04-091-2/+2
| | | | | | | | | | | Add rtems_scheduler_get_processor_maximum() as a replacement for rtems_get_processor_count(). The rtems_get_processor_count() is a bit orphaned. Adopt it by the Scheduler Manager. The count is also misleading, since the processor set may have gaps and the actual count of online processors may be less than the value returned by rtems_get_processor_count(). Update #3732.
* z85c30.c: Do not process 0 baud and return an error (CID 1399713)Joel Sherrill2019-03-141-0/+9
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* Add rtems_board_support_package()Sebastian Huber2019-03-141-0/+6
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* bsps: Adjust shared Doxygen groupsSebastian Huber2019-03-081-0/+8
| | | | Update #3706.
* bsps: Adjust architecture Doxygen groupsSebastian Huber2019-03-044-24/+10
| | | | | | | | | | - Use CamelCase as it is not used in our C code. Enables simple search and replace. - Prefix with "RTEMS" to aid deployment and integration. It aids searching and sorting. Update #3706.
* Remove explicit file names from @fileSebastian Huber2019-02-281-1/+1
| | | | | | This makes the @file documentation independent of the actual file name. Update #3707.
* bsps/irq: Fix interrupt server init (SMP)Sebastian Huber2019-02-071-4/+7
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* grlib: make memory coherency cpu-independentJiri Gaisler2019-01-221-1/+1
| | | | Update #3678.
* grlib: use cpu-independent routines for uncached accessJiri Gaisler2019-01-226-71/+10
| | | | Update #3678.
* grlib: use rtems_interrupt_handler_install()Jiri Gaisler2019-01-224-8/+15
| | | | Update #3678.
* grlib: make apbuart driver independent of bspJiri Gaisler2019-01-221-16/+16
| | | | Update #3678.
* grlib: Move source filesSebastian Huber2019-01-2267-0/+49286
| | | | Update #3678.
* bsps: Add CPU_CACHE_SUPPORT_PROVIDES_DISABLE_DATASebastian Huber2018-12-211-0/+9
| | | | Update #3667.
* bsps: Update cache manager documentationSebastian Huber2018-12-211-22/+57
| | | | Update #3667.
* bsps: Remove superfluous comments in cacheimpl.hSebastian Huber2018-12-211-31/+4
| | | | | | Remove superfluous blank lines. Update #3667.
* Simplify _CPU_Counter_difference()Sebastian Huber2018-12-071-23/+0
| | | | | | | | | | | | | | In order to simplify the use of CPU counter values it is beneficial to have monotonic increasing values within the range of the CPU counter ticks data type, e.g. 32-bit unsigned integer. This eases the use of CPU counter timestamps in external tools which do not know the details of the CPU counter hardware. The CPU counter is the fastest way to get a time on an RTEMS system. Such a CPU counter may be also used as the timecounter. Use it on SPARC for this purpose to simplify the clock drivers. Update #3456.
* bsps/sparc: Fix SMP buildSebastian Huber2018-11-281-0/+9
| | | | Update #3622.
* Remove rtems_cache_*_processor_set() functionsSebastian Huber2018-11-261-91/+0
| | | | | | | | The following rtems_cache_*_processor_set() cache manager API functions are exotic, complex, very hard to use correctly, not used in the RTEMS code base, and apparently unused by applications. Close #3622.
* bsps/irq: Use rtems_malloc()Sebastian Huber2018-11-121-3/+8
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* bsps: Include missing header filesSebastian Huber2018-11-091-0/+2
| | | | Update #3598.
* bsp/beatnik: Fix warningsSebastian Huber2018-11-091-6/+1
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* serial/ns16550: Fix precision clock synthesizerSebastian Huber2018-10-171-15/+16
| | | | | | | The precision clock synthesizer support broke the driver on the QorIQ P1020. On this device the Alternate Function Register is accessed with DLAB == 1 instead of the FIFO Control Register (FCR). Restructure the code to account for this.
* Use rtems_task_exit()Sebastian Huber2018-10-021-1/+1
| | | | | Update #3530. Update #3533.
* network: Use kernel/user space header filesSebastian Huber2018-09-1010-10/+10
| | | | | | | | | | Add and use <machine/rtems-bsd-kernel-space.h> and <machine/rtems-bsd-user-space.h> similar to the libbsd to avoid command line defines and defines scattered throught the code base. Simplify cpukit/libnetworking/Makefile.am. Update #3375.
* bsps: BSP_INTERRUPT_STACK_AT_WORK_AREA_BEGINSebastian Huber2018-09-031-7/+0
| | | | | | | Remove the BSP_INTERRUPT_STACK_AT_WORK_AREA_BEGIN hack. The interrupt stacks are now allocated by the linker. Update #3459.
* libchip/ata: Use rtems_blkdev_create()Sebastian Huber2018-08-071-46/+13
| | | | Update #3358.
* bsps: Fix the generic IRQ supportSebastian Huber2018-08-033-16/+43
| | | | | | | | | The genmcf548x partly uses is own implementation of the interrupt extension API for libbsd support. This patch is a part of the BSP source reorganization. Update #3285.
* serial/ns16550: Precision clock synthesizerSebastian Huber2018-08-011-13/+67
| | | | | | Set the FIFO control register while DLAB == 1 in the line control register. At least on the QorIQ T4240 the driver still works with the re-ordered FIFO control register access.
* serial/ns16550: Use standard register namesSebastian Huber2018-08-011-4/+4
| | | | | Use the standard register names for the divisor latches. This makes it easier to compare the code with other driver implementations.
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