summaryrefslogtreecommitdiffstats
path: root/bsps/shared/dev/irq (follow)
Commit message (Collapse)AuthorAgeFilesLines
* bsps: Use header file for GIC architecture supportSebastian Huber2020-12-232-0/+2
| | | | | | This avoids a function call overhead in the interrupt dispatching. Update #4202.
* bsps: Fix includesSebastian Huber2020-12-221-0/+6
| | | | Update #4202.
* bsps: Remove gicvx_interrupt_dispatch()Sebastian Huber2020-12-162-2/+2
| | | | | | Avoid one level of indirection. Update #4202.
* bsps: Add GICv3 arm_gic_irq_processor_count()Sebastian Huber2020-12-162-0/+34
| | | | Update #4202.
* bsps/gicv3: Resolve build warnings on 64bitKinsey Moore2020-12-111-2/+2
|
* bsps: Remove ARM GIC SGI target filterSebastian Huber2020-12-102-15/+3
| | | | | | | Remove the target filter for software-generated interrupts since this feature is not supported by the affinity routing in GICv3. Update #4202.
* bsps: Fix GICv3 arm_gic_trigger_sgi()Sebastian Huber2020-12-102-3/+3
| | | | | | | | Use the targets parameter to determine the targets of the SGI. Change targets parameter type to 32-bit to ease the parameter passing. GICv3 supports up to 16 targets. Update #4202.
* bsps: Add SMP support to ARM GICv3Sebastian Huber2020-12-091-23/+33
| | | | Update #4202.
* bsps: Move ARM GICv2 driver to bsps/sharedKinsey Moore2020-12-022-1/+276
| | | | | This moves the ARM GICv2 driver to bsps/shared to be usable by AArch64 code.
* bsps: Break out AArch32 GICv3 supportKinsey Moore2020-10-051-0/+354
This breaks out AArch32-specific code so that the shared GICv3 code can be reused by other architectures.