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* bsps/riscv: Simplify PLIC supportSebastian Huber2022-11-231-28/+30
| | | | | In uniprocessor configurations there is no need to take interrupt affinities into account for the interrupt vector enable/disable.
* bsps/riscv: Fix PLIC enable register countSebastian Huber2022-11-231-3/+5
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* bsps/riscv: Add riscv_plic_cpu_0_init()Sebastian Huber2022-11-231-13/+23
| | | | Move boot processor initialization of PLIC to separate function.
* bsps/riscv: Fix bsp_fdt_map_intr()Sebastian Huber2022-11-231-1/+1
| | | | | The interrupt numbers in the device tree are usually PLIC interrupts. Map the number to the vector number associated with an external interrupt.
* bsps/riscv: Change license to BSD-2 for files with Gaisler copyrightDaniel Cederman2022-11-145-12/+90
| | | | | | | | | This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053.
* bsps/riscv: Fix software interrupt dispatchingSebastian Huber2022-11-111-2/+4
| | | | | | | In SMP configurations, there may be no software interrupt handler installed when the software interrupt is processed. Add the new interrupt handler dispatch variant bsp_interrupt_handler_dispatch_unlikely() for this special case.
* bsps/noel: Fix interrupt supportSebastian Huber2022-11-111-0/+2
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* bsps/riscv: Fix PLIC enable register countSebastian Huber2022-11-101-2/+2
| | | | Each PLIC enable register has 32 bits, so we have to divide by 32.
* bsps/riscv: Skip init on not configured processorsSebastian Huber2022-11-101-0/+11
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* bsps/riscv: Simplify riscv_plic_init()Sebastian Huber2022-11-101-30/+39
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* bsps/riscv: Simplify riscv_clint_init()Sebastian Huber2022-11-101-14/+25
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* bsps/riscv: Add tm27 supportSebastian Huber2022-11-101-1/+136
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* bsps/riscv: Always dispatch software interruptsSebastian Huber2022-11-101-3/+2
| | | | This helps to run the interrupt API validation tests.
* bsps/riscv: bsp_interrupt_get/set_affinity()Sebastian Huber2022-11-101-13/+6
| | | | | Provide bsp_interrupt_get_affinity() and bsp_interrupt_set_affinity() only if RTEMS_SMP is enabled. Replace fatal error with a status code.
* bsps/riscv: bsp_interrupt_raise_on()Sebastian Huber2022-11-101-4/+20
| | | | Implement bsp_interrupt_raise_on() and bsp_interrupt_raise().
* bsps/riscv: bsp_interrupt_is_pending()Sebastian Huber2022-11-101-2/+25
| | | | Implement this function.
* bsps/riscv: bsp_interrupt_get_attributes()Sebastian Huber2022-11-101-0/+15
| | | | Implement this function.
* bsps/riscv: Improve bsp_interrupt_vector_disable()Sebastian Huber2022-11-101-0/+8
| | | | Add support for hart-specific software and timer interrupts.
* bsps/riscv: Improve bsp_interrupt_vector_enable()Sebastian Huber2022-11-101-0/+8
| | | | Add support for hart-specific software and timer interrupts.
* bsps/riscv: bsp_interrupt_vector_is_enabled()Sebastian Huber2022-11-101-2/+47
| | | | Implement this function.
* bsps/riscv: bsp_interrupt_is_valid_vector()Sebastian Huber2022-11-102-1/+18
| | | | Implement this function.
* bsps/riscv: Use start data for objectSebastian Huber2022-11-041-0/+6
| | | | | | Maybe this helps to ensure that the object is properly aligned. Update #4658.
* bsps/riscv: Workaround for sporadic linker issuesSebastian Huber2022-10-281-0/+1
| | | | | | | | | | | Disable the linker relaxation in start.S to work around an issue described here: https://mail.gnu.org/archive/html/bug-binutils/2021-03/msg00164.html The real issue is probably in the linker command file or the linker itself. Update #4658.
* bsps: Improve riscv console FDT parsingAlan Cudmore2022-10-141-9/+5
| | | | | | | | | | This fixes a problem with parsing the FDT compatible property by replacing the RISCV_CONSOLE_IS_COMPATIBLE macro with calls to the fdt_stringlist_contains function. The macro only works when the compatible FDT entry is a single string and not a list of strings. The new call will compare each item in the string list. Close #4728.
* riscv: Move functions to avoid build issuesSebastian Huber2022-10-141-10/+0
| | | | | The _RISCV_Map_cpu_index_to_hardid() and _RISCV_Map_hardid_to_cpu_index() functions must be available to all riscv BSPs.
* bsps/riscv: Add Microchip PolarFire SoC BSP variantPadmarao Begari2022-09-208-4/+132
| | | | | | | | The Microchip PolarFire SoC support is implemented as a riscv BSP variant to boot with any individual hart(cpu core) or SMP based on the boot HARTID configurable and support components are 4 CPU Cores (U54), Interrupt controller (PLIC), Timer (CLINT), UART.
* bsps/riscv: Add device tree blobPadmarao Begari2022-09-202-0/+967
| | | | | | | | | | | | | | | | | Add the basic Microchip PolarFire SoC device tree source and blob The mpfs-dtb.h is generated by the bin2hex https://github.com/padmaraob/bin2hex 1.Compile and build the bin2hex.c $ gcc -o bin2hex bin2hex.c 2.Generate the mpfs.dtb from the mpfs.dts $ dtc -O dtb -o mpfs.dtb mpfs.dts 3.Generate the mpfs-dtb.h Header file from the mpfs.dtb. $ ./bin2hex mpfs.dtb
* bsps/riscv/riscv: Fix fe310_uart_readAlan Cudmore2022-09-191-2/+5
| | | | | | | | | | | Note: Resending after learning how to use git send-email, please disregard previous message. This fixes the riscv fe310 console driver fe310_uart_read function. The function reads the RX status/data register to check if data is available, but discards the data and reads it a seconds time. Also cleared the interrupt enable bit in the first_open function. Close #4719
* bsp/riscv: Add NOEL-V BSPMartin Aberg2022-09-068-0/+469
| | | | | | | | | | | | | | | | | | | | Added support for Cobham Gaisler NOEL-V systems. The NOEL-V support is implemented as a riscv BSP. Both 32-bit and 64-bit processor systems are supported. Cobham Gaisler's NOEL-V RISC-V processor IP is described here: https://www.gaisler.com/NOELV Compatible with the following NOEL-V FPGA example design ranges available from Cobham Gaisler. Follow the links for free bit-streams, DTS/DTB, user's manuals and quick-start guides: - NOEL-ARTYA7-EX (https://www.gaisler.com/NOEL-ARTYA7) - NOEL-PF-EX (https://www.gaisler.com/NOEL-PF) - NOEL-XCKU-EX (https://www.gaisler.com/NOEL-XCKU) Uses the shared GRLIB APBUART console driver "apbuart_termios.c". APBUART devices are probed using device tree. Closes #4225.
* bsp/riscv: Work area size based on /memory node in fdtDaniel Cederman2022-09-061-0/+144
| | | | | Uses the first entry in the /memory node to determine the end of the work area. Falls back on linker symbol if unable to parse the node.
* riscv: Use zicsr architecture extensionSebastian Huber2022-02-252-1/+8
| | | | | | | | | | This is required for ISA 2.0 support, see chapter "Zicsr", Control and Status Register (CSR) Instructions, Version 2.0 in RISC-V Instruction Set Manual, Volume I: RISC-V User-Level ISA
* bsps/riscv: Add missing includeSebastian Huber2022-02-251-0/+1
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* bsp_specs: Delete last remnants of these.Joel Sherrill2021-11-292-0/+0
| | | | Updates #3937.
* build: Remove old build systemSebastian Huber2021-09-216-534/+0
| | | | | Close #3250. Close #4081.
* score: Canonicalize _CPU_Fatal_halt()Sebastian Huber2021-07-282-2/+4
| | | | | | | | Move _CPU_Fatal_halt() declaration to <rtems/score/cpuimpl.h> and make sure it is a proper declaration of a function which does not return. Fix the type of the error code. If necessary, add the implementation to cpu.c. Implementing _CPU_Fatal_halt() as a function makes it possible to wrap this function for example to fully test _Terminate().
* bsps/irq: bsp_interrupt_facility_initialize()Sebastian Huber2021-07-272-6/+2
| | | | | | Do not return a status code in bsp_interrupt_facility_initialize() since this leads to unreachable code in bsp_interrupt_initialize(). Use RTEMS_DEBUG assertions in bsp_interrupt_facility_initialize() if necessary.
* bsps/irq: bsp_interrupt_set_affinity()Sebastian Huber2021-07-264-6/+10
| | | | | | Return a status code for bsp_interrupt_set_affinity(). Update #3269.
* bsps/irq: bsp_interrupt_get_affinity()Sebastian Huber2021-07-264-4/+8
| | | | | | Return a status code for bsp_interrupt_get_affinity(). Update #3269.
* bsps/irq: bsp_interrupt_vector_disable()Sebastian Huber2021-07-262-2/+5
| | | | | | Return a status code for bsp_interrupt_vector_disable(). Update #3269.
* bsps/irq: bsp_interrupt_vector_enable()Sebastian Huber2021-07-262-2/+5
| | | | | | Return a status code for bsp_interrupt_vector_enable(). Update #3269.
* bsps/irq: Add rtems_interrupt_is_pending()Sebastian Huber2021-07-262-0/+22
| | | | | | Add a default implementation which just returns RTEMS_UNSATISFIED. Update #3269.
* bsps/irq: Add rtems_interrupt_get_attributes()Sebastian Huber2021-07-262-0/+16
| | | | | | | Add a default implementation which clears the attributes to zero and just returns RTEMS_SUCCESSFUL for valid parameters. Update #3269.
* bsps/irq: Add rtems_interrupt_raise()Sebastian Huber2021-07-262-0/+46
| | | | | | | | | Add rtems_interrupt_raise_on() and rtems_interrupt_clear(). Add a default implementation which just returns RTEMS_UNSATISFIED for valid parameters. Update #3269.
* bsps/irq: Add rtems_interrupt_vector_is_enabled()Sebastian Huber2021-07-262-0/+22
| | | | | | | Add a default implementation which just returns RTEMS_UNSATISFIED for valid parameters. Update #3269.
* bsps/irq: Remove BSP_INTERRUPT_VECTOR_MAXSebastian Huber2021-06-242-2/+0
| | | | | | This define is no longer used. Update #3269.
* bsps/irq: Add BSP_INTERRUPT_VECTOR_COUNTSebastian Huber2021-06-242-0/+2
| | | | | | | | | | | | | Assert BSP_INTERRUPT_VECTOR_MAX + 1 == BSP_INTERRUPT_VECTOR_COUNT. After building all BSPs with this patch, BSP_INTERRUPT_VECTOR_MAX can be removed and replaced by BSP_INTERRUPT_VECTOR_COUNT. The BSP_INTERRUPT_VECTOR_COUNT allows a default implementation which supports no interrupt vector at all. Using COUNT instead of MAX may avoid some interpretation issues, for example is the maximum value a valid vector number or not. Update #3269.
* bsps/irq: Remove BSP_INTERRUPT_VECTOR_MINSebastian Huber2021-06-242-4/+0
| | | | | | | | | | Remove BSP_INTERRUPT_VECTOR_MIN and unconditionally let interrupt vector numbers start with zero. The BSP_INTERRUPT_VECTOR_MIN == 0 invariant was tested by the previous commit and building all BSPs. Update #3269.
* grlib: Add apbuart_outbyte_wait()Sebastian Huber2021-06-171-1/+2
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* grlib: Remove NL -> CR in apbuart_outbyte_polled()Sebastian Huber2021-06-171-1/+1
| | | | This is already done in rtems_putc().
* grlib: Add ambapp_plb()Sebastian Huber2021-06-175-16/+25
| | | | | Replace the global variable ambapp_plb with a function to allow an automatic on demand initialization.
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