| Commit message (Collapse) | Author | Age | Files | Lines |
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In a multi-processor system we must broadcast the TLB maintenance operation to
the Inner Shareable domain to ensure that the other processors update their TLB
caches accordingly.
Close #4068.
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The small page MMU support reduces the granularity for memory settings
through the MMU from 1MiB sections to 4KiB small pages.
Enable it by default on the realview_pbx_a9_qemu BSP.
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- The TI's CortexA7 MP MPIDR register returns 0
Updates #3760
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Closes #3760
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Closes #3762
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This patch is a part of the BSP source reorganization.
Update #3285.
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This patch is a part of the BSP source reorganization.
Update #3285.
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This patch is a part of the BSP source reorganization.
Update #3285.
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