rtems - RTEMS Kernel, file-systems, drivers, BSPs, samples, and testsuite.

	Commit message (Collapse)	Author	Files	Lines
2019-11-19	bsp/altcycv_devkit: Rename linker command file	Sebastian Huber	1	-0/+0
	This BSP family uses only one linker command file. Use the standard name. Update #3818.
2018-04-20	bsps: Move startup files to bsps	Sebastian Huber	1	-0/+0
	Adjust build support files to new directory layout. This patch is a part of the BSP source reorganization. Update #3285.
2017-12-19	bsp/altera-cyclone-v: Adjust work area	Sebastian Huber	1	-1/+1
	Use FDT to adjust the work area. Reduce work area of linker command file.
2014-11-27	bsps/arm: Add .nocache section	Sebastian Huber	1	-11/+0
	This section can be use to provide a cache coherent memory area via rtems_cache_coherent_add_area().
2014-06-06	bsp/altera-cyclone-v: Use NOLOAD for nocache sec	Sebastian Huber	1	-1/+1

2014-05-28	bsp/altera-cyclone-v: Reduce size of nocache heap	Ralf Kirchner	1	-2/+2
	Network mbufs and clusters now are cached. Thus the nocache heap can get reduced to 1 MByte.
2014-04-30	bsp/altera-cyclone-v: Increase size of nocache region and nocache heap	Ralf Kirchner	1	-2/+2
	Increase size of nocache heap in order to be able to move mbufs and clusters of the network driver to uncached RAM
2014-03-13	bsp/altera-cyclone-v: New BSP	Ralf Kirchner	1	-0/+18
	Implemented so far: - nocache heap for uncached RAM - basic timer - level 1 cache handling for arm cache controller in arm-cache-l1.h - level 2 L2C-310 cache controller - MMU - DWMAC 1000 ethernet controller - basic errata handling - smp startup for second core