summaryrefslogtreecommitdiffstats
path: root/bsps/aarch64 (follow)
Commit message (Expand)AuthorAgeFilesLines
* bsps/aarch64: add non-secure mode and versal supportGedare Bloom2021-06-241-2/+16
* bsps/aarch64: add physical secure timerGedare Bloom2021-06-242-0/+9
* aarch64: add support to drop EL3 to EL2Kinsey Moore2021-06-241-1/+26
* aarch64/xilinx-versal: new BSPs for qemu and vck190Gedare Bloom2021-06-2410-0/+965
* bsps/irq: Remove BSP_INTERRUPT_VECTOR_MAXSebastian Huber2021-06-243-3/+0
* bsps/irq: Add BSP_INTERRUPT_VECTOR_COUNTSebastian Huber2021-06-243-0/+3
* bsps/irq: Remove BSP_INTERRUPT_VECTOR_MINSebastian Huber2021-06-243-3/+0
* aarch64: add qemu bsps for cortex-a72Gedare Bloom2021-06-096-0/+355
* bsps/aarch64: Add MMU driver to relax alignmentKinsey Moore2021-05-275-0/+518
* bsps/aarch64: Advertise cache function supportKinsey Moore2021-05-271-0/+10
* bsps/aarch64: Align MVAs consistentlyKinsey Moore2021-05-271-8/+5
* bsps/aarch64: Break out system registersKinsey Moore2021-05-271-180/+33
* bsps/xilinx-zynqmp: Avoid constant UART reinitKinsey Moore2021-04-191-0/+6
* bsps/aarch64: Add support for EL2 startKinsey Moore2021-03-051-0/+25
* bsps/aarch64: RTEMS_DEBUG stack alignment faultsKinsey Moore2021-03-051-0/+8
* bsps: Allow override of ARM TM27 IRQsKinsey Moore2021-03-051-0/+8
* bsps/aarch64: Resolve usage of SUBALIGN()Kinsey Moore2021-03-051-4/+2
* bsps/aarch64: Add missing includeSebastian Huber2021-01-281-0/+1
* bsps: Add missing DWARF 5 sectionsSebastian Huber2021-01-261-3/+5
* bsps: Support DWARF 5 sectionsSebastian Huber2021-01-251-8/+13
* bsps/aarch64: Swap primary ZynqMP UARTKinsey Moore2021-01-142-4/+4
* bsps: Use header file for GIC architecture supportSebastian Huber2020-12-231-3/+17
* bsps: Fix includesSebastian Huber2020-12-221-1/+0
* bsps: Remove gicvx_interrupt_dispatch()Sebastian Huber2020-12-161-5/+0
* Add AArch64 ZynpMP BSPKinsey Moore2020-12-046-0/+426
* bsps: Move ARM GICv2 driver to bsps/sharedKinsey Moore2020-12-021-1/+1
* spec/aarch64: Only apply SUBALIGN(4) to ILP32Kinsey Moore2020-11-231-2/+4
* bsps: Add Cortex-A53 ILP32 BSP variantKinsey Moore2020-10-051-0/+16
* bsps: Add Cortex-A53 LP64 basic BSPKinsey Moore2020-10-0513-0/+2137
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-16 07:39:31 +0000