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* bsps/zynq-uart: Make post baud change kick globalKinsey Moore2021-06-291-5/+0
| | | | | | | | The existing fix for the ZynqMP UART hardware bug only caught the vast majority of instances where it could occur. To fully fix the data corruption, this fix must be applied after every baud rate change. This makes the logic reset and kick apply in any locations where the baud rate could be changed.
* bsps/irq: Remove BSP_INTERRUPT_VECTOR_MAXSebastian Huber2021-06-241-1/+0
| | | | | | This define is no longer used. Update #3269.
* bsps/irq: Add BSP_INTERRUPT_VECTOR_COUNTSebastian Huber2021-06-241-0/+1
| | | | | | | | | | | | | Assert BSP_INTERRUPT_VECTOR_MAX + 1 == BSP_INTERRUPT_VECTOR_COUNT. After building all BSPs with this patch, BSP_INTERRUPT_VECTOR_MAX can be removed and replaced by BSP_INTERRUPT_VECTOR_COUNT. The BSP_INTERRUPT_VECTOR_COUNT allows a default implementation which supports no interrupt vector at all. Using COUNT instead of MAX may avoid some interpretation issues, for example is the maximum value a valid vector number or not. Update #3269.
* bsps/irq: Remove BSP_INTERRUPT_VECTOR_MINSebastian Huber2021-06-241-1/+0
| | | | | | | | | | Remove BSP_INTERRUPT_VECTOR_MIN and unconditionally let interrupt vector numbers start with zero. The BSP_INTERRUPT_VECTOR_MIN == 0 invariant was tested by the previous commit and building all BSPs. Update #3269.
* bsps/aarch64: Add MMU driver to relax alignmentKinsey Moore2021-05-273-0/+85
| | | | | | | | | | | | | | | Currently, the AArch64 BSPs have a hard time running on real hardware without building the toolchain and the bsps with -mstrict-align in multiple places. Configuring the MMU on these chips allows for unaligned memory accesses for non-device memory which avoids requiring strict alignment in the toolchain and in the BSPs themselves. In writing this driver, it was found that the synchronous exception handling code needed to be rewritten since it relied on clearing SCTLR_EL1 to avoid thread stack misalignments in RTEMS_DEBUG mode. This is now avoided by exactly preserving thread mode stack and flags and the new implementation is compatible with the draft information provided on the mailing list covering the Exception Management API.
* bsps/xilinx-zynqmp: Avoid constant UART reinitKinsey Moore2021-04-191-0/+6
| | | | | | Constantly reinitializing the Cadence UART on every character output causes data corruption/loss on some ZynqMP hardware. Only initialize the UART once for early output and give it a kick on startup.
* bsps: Allow override of ARM TM27 IRQsKinsey Moore2021-03-051-0/+8
| | | | | | ZynqMP hardware appears to have an odd hard-wired SGI implementation in which the SGIs are permanently set as enabled or disabled. Allow the TM27 IRQs to be overridden as necessary.
* bsps/aarch64: Swap primary ZynqMP UARTKinsey Moore2021-01-142-4/+4
| | | | | Both Qemu and actual hardware treat the second UART in memory map as the primary UART. This adjusts the ZynqMP BSPs to match.
* Add AArch64 ZynpMP BSPKinsey Moore2020-12-046-0/+426
This adds a BSP family that runs on the Xilinx Ultrascale+ MPSOC (ZynqMP) family of chips. It is configured to be usable on the Qemu ZCU102 machine definition and should be almost trivially portable to ZynqMP development boards and custom hardware. It is also configured to be usable with libbsd.