| Commit message (Collapse) | Author | Files | Lines |
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Always start the executive in Exception Level 1, Non-Secure mode.
If we boot in EL3 Secure with GICv3 then we have to initialize
the distributor and redistributor to set up G1NS interrupts
early in the boot sequence before stepping down from EL3S to EL1NS.
Now there is no need to distinguish between secure and non-secure
world execution after the primary core boots, so get rid of the
AARCH64_IS_NONSECURE configuration option.
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Currently, the AArch64 BSPs have a hard time running on real hardware
without building the toolchain and the bsps with -mstrict-align in
multiple places. Configuring the MMU on these chips allows for unaligned
memory accesses for non-device memory which avoids requiring strict
alignment in the toolchain and in the BSPs themselves.
In writing this driver, it was found that the synchronous exception
handling code needed to be rewritten since it relied on clearing SCTLR_EL1 to
avoid thread stack misalignments in RTEMS_DEBUG mode. This is now
avoided by exactly preserving thread mode stack and flags and the new
implementation is compatible with the draft information provided on the
mailing list covering the Exception Management API.
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This adds a BSP family that runs on the Xilinx Ultrascale+ MPSOC
(ZynqMP) family of chips. It is configured to be usable on the Qemu
ZCU102 machine definition and should be almost trivially portable to
ZynqMP development boards and custom hardware. It is also configured to
be usable with libbsd.
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This adds an AArch64 basic BSP based on Qemu's Cortex-A53 emulation with
interrupt support using GICv3 and clock support using the ARM GPT.
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Create the Xen BSP for Xen on ARM.
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Modifications to get xilinx-zynqmp BSP working on an Ultra96 board.
Update #3682.
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Source files were copied from xilinx-zynq.
Update #3682.
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Relicense contributions from Chris Johns, Christian Mauderer,
embedded brains GmbH, Joel Sherrill, OAR, Pavel Pisa, Ralf Kirchner, and
Sebastian Huber.
Update #3053.
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Adjust build support files to new directory layout.
This patch is a part of the BSP source reorganization.
Update #3285.
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Script does what is expected and tries to do it as
smartly as possible.
+ remove occurrences of two blank comment lines
next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
contain CVS Ids
+ If the processing left a blank line at the top of
a file, it was removed.
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PR 1799/bsps
* .cvsignore, ChangeLog, Makefile.am, README, bsp_specs, configure.ac,
clock/clock-config.c, console/console-config.c,
console/uart-bridge-master.c, console/uart-bridge-slave.c,
include/.cvsignore, include/bsp.h, include/hwreg_vals.h,
include/intercom.h, include/irq.h, include/mmu.h, include/qoriq.h,
include/tm27.h, include/tsec-config.h, include/u-boot-config.h,
include/uart-bridge.h, irq/irq.c, make/custom/qoriq.inc,
make/custom/qoriq_core_0.cfg, make/custom/qoriq_core_1.cfg,
make/custom/qoriq_p1020rdb.cfg, network/if_intercom.c,
network/network.c, rtc/rtc-config.c, shmsupp/intercom-mpci.c,
shmsupp/intercom.c, shmsupp/lock.S, start/start.S,
startup/bsppredriverhook.c, startup/bspreset.c, startup/bspstart.c,
startup/linkcmds.base, startup/linkcmds.qoriq_core_0,
startup/linkcmds.qoriq_core_1, startup/linkcmds.qoriq_p1020rdb,
startup/mmu-config.c, startup/mmu-tlb1.S, startup/mmu.c: New files.
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* include/u-boot.h: Removed file.
* include/u-boot-config.h: New file.
* include/bsp.h, start/start.S, startup/bspstart.c: Use new U-Boot
support.
* Makefile.am, preinstall.am: Reflect changes above.
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* preinstall.am, shared/lpc/include/lpc-i2s.h,
shared/startup/linkcmds.armv4, shared/startup/linkcmds.armv7: New
files.
* Makefile.am: Added header and linker command files intended to be
used by every ARM BSP.
* shared/startup/linkcmds.base: Support for EABI and ARM ELF standard.
* shared/include/linker-symbols.h: Update due to linker command file
changes.
* shared/start/start.S, shared/include/start.h: Renamed entry symbol
from start to _start to avoid namespace conflicts. Update due to
linker command file changes.
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