rtems - RTEMS Kernel, file-systems, drivers, BSPs, samples, and testsuite.

	Commit message (Collapse)	Author	Age	Files	Lines
*	bsps/aarch64: add non-secure mode and versal support	Gedare Bloom	2021-06-24	1	-2/+16
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*	aarch64: add support to drop EL3 to EL2	Kinsey Moore	2021-06-24	1	-1/+26
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*	bsps/aarch64: Add support for EL2 start	Kinsey Moore	2021-03-05	1	-0/+25
\| \| \| \| \|	Add the stub necessary to boot on AArch64 under EL2 and drop to EL1 for normal operation.
*	bsps/aarch64: RTEMS_DEBUG stack alignment faults	Kinsey Moore	2021-03-05	1	-0/+8
\| \| \| \| \| \|	Run with stack alignment faults enabled under RTEMS_DEBUG to catch any stack misalignments early. This makes it easier to track them down should they ever occur.
*	bsps/aarch64: Resolve usage of SUBALIGN()	Kinsey Moore	2021-03-05	1	-4/+2
\| \| \| \| \| \| \| \|	Remove usage of SUBALIGN() in aarch64 linkcmds which works around a difference in behavior on AArch64 platforms. This is no longer necessary since alignment is now enforced explicitly. Closes #4178.
*	bsps: Add missing DWARF 5 sections	Sebastian Huber	2021-01-26	1	-3/+5
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*	bsps: Support DWARF 5 sections	Sebastian Huber	2021-01-25	1	-8/+13
\| \| \| \|	GCC 11 uses DWARF 5 by default.
*	spec/aarch64: Only apply SUBALIGN(4) to ILP32	Kinsey Moore	2020-11-23	1	-2/+4
\| \| \| \| \| \| \|	The SUBALIGN(4) required on rtemsroset and rtemsrwset for ILP32 builds was previously present on LP64 builds and causes no issues within RTEMS, but causes relocation/alignment issues when building libbsd. This restricts those alignment changes to ILP32 builds.
*	bsps: Add Cortex-A53 ILP32 BSP variant	Kinsey Moore	2020-10-05	1	-0/+16
\| \| \| \| \| \|	This adds an AArch64 ILP32 BSP variant based on Qemu's Cortex-A53 emulation with interrupt support using GICv3 and clock support using the ARM GPT.
*	bsps: Add Cortex-A53 LP64 basic BSP	Kinsey Moore	2020-10-05	2	-0/+644
	This adds an AArch64 basic BSP based on Qemu's Cortex-A53 emulation with interrupt support using GICv3 and clock support using the ARM GPT.