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* Patch rtems-rc-20000731-2-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-08-0112-20/+20
* Patch rtems-rc-20000801-1-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-08-013-3/+3
* Patch rtems-rc-20000731-1-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-08-011-1/+1
* Updated versions.Joel Sherrill2000-08-011-2/+2
* Removed unused macro.Joel Sherrill2000-08-011-17/+0
* Corrected BSP name in script.Joel Sherrill2000-08-011-1/+1
* Added numerous BSPs.Joel Sherrill2000-08-011-3/+6
* New files.Joel Sherrill2000-08-012-0/+15
* ARMulator BSP now runs with gdb 5.0.Joel Sherrill2000-08-012-1/+36
* Closer to linking. h8300-rtems-ld now core dumps.Joel Sherrill2000-07-313-16/+33
* New bsp for simulator in gdb. Does not work yet.Joel Sherrill2000-07-3126-0/+1343
* Patch rtems-rc-20000713-1-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-07-272-27/+0
* Minor problems addressed with the merger and with the arm_bare_bsp.Joel Sherrill2000-07-2719-195/+76
* Port of RTEMS to the ARM processor family by Eric ValetteJoel Sherrill2000-07-2780-21/+6598
* Patch from Charles-Antoine Gauthier <charles.gauthier@nrc.ca> thatJoel Sherrill2000-07-264-75/+79
* changed version to ss-20000726Joel Sherrill2000-07-261-1/+1
* Added ifdef on C4x to avoid invalid address alignment checks since thereJoel Sherrill2000-07-266-0/+56
* Port of RTEMS to the Texas Instruments C3x/C4x DSP families includingJoel Sherrill2000-07-2628-16/+93
* Port of RTEMS to the Texas Instruments C3x/C4x DSP families includingJoel Sherrill2000-07-2659-33/+205
* Patch rtems-rc-20000713-1-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-07-251-2/+0
* Patch rtems-rc-20000725-1-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-07-251-1/+1
* Added c3xsim as alias of c4xsim.Joel Sherrill2000-07-252-0/+2
* Forgot to remove these when code moved.Joel Sherrill2000-07-2516-4955/+0
* Use bitwise and not cast to unsigned16 to remove upper bits.Joel Sherrill2000-07-244-4/+12
* Fixed so autoconf macros will like this file.Joel Sherrill2000-07-241-2/+0
* Corrected spelling mistake.Joel Sherrill2000-07-241-1/+1
* Corrected file name in EXTRA_DIST setting.Joel Sherrill2000-07-241-1/+1
* Patch from Eric Valette <valette@crf.canon.fr> with debuggingJoel Sherrill2000-07-241-7/+15
* changed version to ss-20000717Joel Sherrill2000-07-171-1/+5
* Make _ISR_Dispatch global.Joel Sherrill2000-07-172-0/+2
* Update from Philip Quaife <rtemsdev@qs.co.nz> that was hand-merged.Joel Sherrill2000-07-174-68/+150
* Changed default value to "pause".Joel Sherrill2000-07-171-1/+1
* Changed name of static table versions to avoid conflict.Joel Sherrill2000-07-143-6/+6
* Switch logical in conditional.Joel Sherrill2000-07-132-2/+2
* Patch rtems-rc-20000713-1-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-07-13159-402/+191
* Removed NDEBUG as a per BSP option.Joel Sherrill2000-07-1344-217/+5
* Removed references to stack checker defines since it is dynamicallyJoel Sherrill2000-07-122-12/+0
* Removed stupid reference to NO_TABLE_MOVE in comment block.Joel Sherrill2000-07-128-26/+0
* Patch rtems-rc-20000712-1-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-07-1247-166/+27
* Added comment.Joel Sherrill2000-07-121-1/+1
* Removed unnecessary include of targopts.h.Joel Sherrill2000-07-121-1/+1
* Added comment.Joel Sherrill2000-07-122-2/+4
* Removed unnecessary include of targopts.h.Joel Sherrill2000-07-121-1/+0
* Added comment.Joel Sherrill2000-07-122-2/+2
* New file missed in earlier commit.Joel Sherrill2000-07-121-0/+22
* Removed no cpu references.Joel Sherrill2000-07-1125-30/+30
* New file.Joel Sherrill2000-07-111-0/+2
* Reworked score/cpu/sparc so it can be safely compiled multilib. AllJoel Sherrill2000-07-1129-796/+105
* Added Hitachi H8/300 to the list of CPUs that should be OK withJoel Sherrill2000-07-112-0/+2
* Adding .cvsignore files.Joel Sherrill2000-07-115-0/+21