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-rw-r--r--testsuites/validation/tc-intr-vector-is-enabled.c55
1 files changed, 36 insertions, 19 deletions
diff --git a/testsuites/validation/tc-intr-vector-is-enabled.c b/testsuites/validation/tc-intr-vector-is-enabled.c
index de1d0c2ebb..d24ad3f602 100644
--- a/testsuites/validation/tc-intr-vector-is-enabled.c
+++ b/testsuites/validation/tc-intr-vector-is-enabled.c
@@ -3,11 +3,11 @@
/**
* @file
*
- * @ingroup RTEMSTestCaseRtemsIntrReqVectorIsEnabled
+ * @ingroup RtemsIntrReqVectorIsEnabled
*/
/*
- * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ * Copyright (C) 2021 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -61,10 +61,9 @@
#include <rtems/test.h>
/**
- * @defgroup RTEMSTestCaseRtemsIntrReqVectorIsEnabled \
- * spec:/rtems/intr/req/vector-is-enabled
+ * @defgroup RtemsIntrReqVectorIsEnabled spec:/rtems/intr/req/vector-is-enabled
*
- * @ingroup RTEMSTestSuiteTestsuitesValidation0
+ * @ingroup TestsuitesValidationIntr
*
* @{
*/
@@ -144,7 +143,7 @@ typedef struct {
/**
* @brief This member specifies if the ``enabled`` parameter value.
*/
- bool *enabled;;
+ bool *enabled;
/**
* @brief This member contains the return value of the
@@ -154,6 +153,12 @@ typedef struct {
struct {
/**
+ * @brief This member defines the pre-condition indices for the next
+ * action.
+ */
+ size_t pci[ 3 ];
+
+ /**
* @brief This member defines the pre-condition states for the next action.
*/
size_t pcs[ 3 ];
@@ -584,16 +589,27 @@ RtemsIntrReqVectorIsEnabled_PopEntry(
];
}
+static void RtemsIntrReqVectorIsEnabled_SetPreConditionStates(
+ RtemsIntrReqVectorIsEnabled_Context *ctx
+)
+{
+ ctx->Map.pcs[ 0 ] = ctx->Map.pci[ 0 ];
+ ctx->Map.pcs[ 1 ] = ctx->Map.pci[ 1 ];
+
+ if ( ctx->Map.entry.Pre_IsEnabled_NA ) {
+ ctx->Map.pcs[ 2 ] = RtemsIntrReqVectorIsEnabled_Pre_IsEnabled_NA;
+ } else {
+ ctx->Map.pcs[ 2 ] = ctx->Map.pci[ 2 ];
+ }
+}
+
static void RtemsIntrReqVectorIsEnabled_TestVariant(
RtemsIntrReqVectorIsEnabled_Context *ctx
)
{
RtemsIntrReqVectorIsEnabled_Pre_Vector_Prepare( ctx, ctx->Map.pcs[ 0 ] );
RtemsIntrReqVectorIsEnabled_Pre_Enabled_Prepare( ctx, ctx->Map.pcs[ 1 ] );
- RtemsIntrReqVectorIsEnabled_Pre_IsEnabled_Prepare(
- ctx,
- ctx->Map.entry.Pre_IsEnabled_NA ? RtemsIntrReqVectorIsEnabled_Pre_IsEnabled_NA : ctx->Map.pcs[ 2 ]
- );
+ RtemsIntrReqVectorIsEnabled_Pre_IsEnabled_Prepare( ctx, ctx->Map.pcs[ 2 ] );
RtemsIntrReqVectorIsEnabled_Action( ctx );
RtemsIntrReqVectorIsEnabled_Post_Status_Check(
ctx,
@@ -620,21 +636,22 @@ T_TEST_CASE_FIXTURE(
ctx->Map.index = 0;
for (
- ctx->Map.pcs[ 0 ] = RtemsIntrReqVectorIsEnabled_Pre_Vector_Valid;
- ctx->Map.pcs[ 0 ] < RtemsIntrReqVectorIsEnabled_Pre_Vector_NA;
- ++ctx->Map.pcs[ 0 ]
+ ctx->Map.pci[ 0 ] = RtemsIntrReqVectorIsEnabled_Pre_Vector_Valid;
+ ctx->Map.pci[ 0 ] < RtemsIntrReqVectorIsEnabled_Pre_Vector_NA;
+ ++ctx->Map.pci[ 0 ]
) {
for (
- ctx->Map.pcs[ 1 ] = RtemsIntrReqVectorIsEnabled_Pre_Enabled_Obj;
- ctx->Map.pcs[ 1 ] < RtemsIntrReqVectorIsEnabled_Pre_Enabled_NA;
- ++ctx->Map.pcs[ 1 ]
+ ctx->Map.pci[ 1 ] = RtemsIntrReqVectorIsEnabled_Pre_Enabled_Obj;
+ ctx->Map.pci[ 1 ] < RtemsIntrReqVectorIsEnabled_Pre_Enabled_NA;
+ ++ctx->Map.pci[ 1 ]
) {
for (
- ctx->Map.pcs[ 2 ] = RtemsIntrReqVectorIsEnabled_Pre_IsEnabled_Yes;
- ctx->Map.pcs[ 2 ] < RtemsIntrReqVectorIsEnabled_Pre_IsEnabled_NA;
- ++ctx->Map.pcs[ 2 ]
+ ctx->Map.pci[ 2 ] = RtemsIntrReqVectorIsEnabled_Pre_IsEnabled_Yes;
+ ctx->Map.pci[ 2 ] < RtemsIntrReqVectorIsEnabled_Pre_IsEnabled_NA;
+ ++ctx->Map.pci[ 2 ]
) {
ctx->Map.entry = RtemsIntrReqVectorIsEnabled_PopEntry( ctx );
+ RtemsIntrReqVectorIsEnabled_SetPreConditionStates( ctx );
RtemsIntrReqVectorIsEnabled_TestVariant( ctx );
}
}