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-rw-r--r--testsuites/smptests/smpipi01/init.c79
1 files changed, 64 insertions, 15 deletions
diff --git a/testsuites/smptests/smpipi01/init.c b/testsuites/smptests/smpipi01/init.c
index 5f992f8de1..f8172fed96 100644
--- a/testsuites/smptests/smpipi01/init.c
+++ b/testsuites/smptests/smpipi01/init.c
@@ -1,15 +1,28 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/*
- * Copyright (c) 2014, 2019 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2014, 2019 embedded brains GmbH & Co. KG
*
- * embedded brains GmbH
- * Dornierstr. 4
- * 82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifdef HAVE_CONFIG_H
@@ -185,6 +198,43 @@ static const Per_CPU_Job_context counter_1_job_context = {
.arg = &test_instance
};
+static void sync_handler(void *arg)
+{
+ test_context *ctx = arg;
+ SMP_barrier_State *bs = &ctx->worker_barrier_state;
+
+ /* (E) */
+ barrier(ctx, bs);
+}
+
+static const Per_CPU_Job_context sync_context = {
+ .handler = sync_handler,
+ .arg = &test_instance
+};
+
+static void wait_for_ipi_done(test_context *ctx, Per_CPU_Control *cpu)
+{
+ Per_CPU_Job job;
+ unsigned long done;
+
+ job.context = &sync_context;
+ _Per_CPU_Submit_job(cpu, &job);
+
+ while (cpu->isr_nest_level == 0) {
+ RTEMS_COMPILER_MEMORY_BARRIER();
+ }
+
+ /* (E) */
+ barrier(ctx, &ctx->main_barrier_state);
+
+ while (cpu->isr_nest_level != 0) {
+ RTEMS_COMPILER_MEMORY_BARRIER();
+ }
+
+ done = _Atomic_Load_ulong( &job.done, ATOMIC_ORDER_ACQUIRE );
+ rtems_test_assert( done == PER_CPU_JOB_DONE );
+}
+
static void test_send_message_flood(
test_context *ctx,
uint32_t cpu_count
@@ -198,20 +248,15 @@ static void test_send_message_flood(
ctx->jobs[cpu_index][0].context = &counter_0_job_context;
ctx->jobs[cpu_index][1].context = &counter_1_job_context;
- _Per_CPU_Submit_job(cpu, &ctx->jobs[cpu_index][0]);
+ _Per_CPU_Add_job(cpu, &ctx->jobs[cpu_index][0]);
}
for (cpu_index = 0; cpu_index < cpu_count; ++cpu_index) {
Per_CPU_Control *cpu;
- Per_CPU_Control *cpu_self;
uint32_t i;
cpu = _Per_CPU_Get_by_index(cpu_index);
- cpu_self = _Thread_Dispatch_disable();
- _SMP_Synchronize();
- _Thread_Dispatch_enable(cpu_self);
-
for (i = 0; i < cpu_count; ++i) {
if (i != cpu_index) {
ctx->copy_counters[i] = ctx->counters[i].value;
@@ -222,6 +267,10 @@ static void test_send_message_flood(
_SMP_Send_message(cpu, SMP_MESSAGE_PERFORM_JOBS);
}
+ if (cpu_index != cpu_index_self) {
+ wait_for_ipi_done(ctx, cpu);
+ }
+
for (i = 0; i < cpu_count; ++i) {
if (i != cpu_index) {
rtems_test_assert(ctx->copy_counters[i] == ctx->counters[i].value);