diff options
Diffstat (limited to '')
26 files changed, 588 insertions, 0 deletions
diff --git a/spec/build/bsps/riscv/riscv/abi.yml b/spec/build/bsps/riscv/riscv/abi.yml new file mode 100644 index 0000000000..e975b87c4c --- /dev/null +++ b/spec/build/bsps/riscv/riscv/abi.yml @@ -0,0 +1,79 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- split: null +- env-append: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: +- -march=rv32imac +- -mabi=ilp32 +default-by-variant: +- value: + - -march=rv64imafdc + - -mabi=lp64d + - -mcmodel=medany + variants: + - riscv/rv64imafdc_medany +- value: + - -march=rv64imafdc + - -mabi=lp64d + variants: + - riscv/rv64imafdc +- value: + - -march=rv64imafd + - -mabi=lp64d + - -mcmodel=medany + variants: + - riscv/rv64imafd_medany +- value: + - -march=rv64imafd + - -mabi=lp64d + variants: + - riscv/rv64imafd +- value: + - -march=rv64imac + - -mabi=lp64 + - -mcmodel=medany + variants: + - riscv/rv64imac_medany +- value: + - -march=rv64imac + - -mabi=lp64 + variants: + - riscv/rv64imac +- value: [] + variants: + - riscv/rv32imafdc +- value: + - -march=rv32imafd + - -mabi=ilp32d + variants: + - riscv/rv32imafd +- value: + - -march=rv32imafc + - -mabi=ilp32f + variants: + - riscv/rv32imafc +- value: + - -march=rv32im + - -mabi=ilp32 + variants: + - riscv/rv32im +- value: + - -march=rv32iac + - -mabi=ilp32 + variants: + - riscv/rv32iac +- value: + - -march=rv32i + - -mabi=ilp32 + variants: + - riscv/rv32i +description: | + ABI flags +enabled-by: true +links: [] +name: ABI_FLAGS +type: build diff --git a/spec/build/bsps/riscv/riscv/bspfrdme310arty.yml b/spec/build/bsps/riscv/riscv/bspfrdme310arty.yml new file mode 100644 index 0000000000..a13b12dc3c --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bspfrdme310arty.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: frdme310arty +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv32i.yml b/spec/build/bsps/riscv/riscv/bsprv32i.yml new file mode 100644 index 0000000000..168839eb31 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv32i.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv32i +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv32iac.yml b/spec/build/bsps/riscv/riscv/bsprv32iac.yml new file mode 100644 index 0000000000..ce226c6344 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv32iac.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv32iac +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv32im.yml b/spec/build/bsps/riscv/riscv/bsprv32im.yml new file mode 100644 index 0000000000..a6c77b421b --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv32im.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv32im +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv32imac.yml b/spec/build/bsps/riscv/riscv/bsprv32imac.yml new file mode 100644 index 0000000000..25b9a4d00f --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv32imac.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv32imac +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv32imafc.yml b/spec/build/bsps/riscv/riscv/bsprv32imafc.yml new file mode 100644 index 0000000000..fa8ce6a1d1 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv32imafc.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv32imafc +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv32imafd.yml b/spec/build/bsps/riscv/riscv/bsprv32imafd.yml new file mode 100644 index 0000000000..5ac45fdd2c --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv32imafd.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv32imafd +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv32imafdc.yml b/spec/build/bsps/riscv/riscv/bsprv32imafdc.yml new file mode 100644 index 0000000000..104a7a1391 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv32imafdc.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv32imafdc +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv64imac.yml b/spec/build/bsps/riscv/riscv/bsprv64imac.yml new file mode 100644 index 0000000000..99dab47754 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv64imac.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv64imac +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv64imacmedany.yml b/spec/build/bsps/riscv/riscv/bsprv64imacmedany.yml new file mode 100644 index 0000000000..c0db3e0720 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv64imacmedany.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv64imac_medany +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv64imafd.yml b/spec/build/bsps/riscv/riscv/bsprv64imafd.yml new file mode 100644 index 0000000000..730a76a41d --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv64imafd.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv64imafd +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv64imafdc.yml b/spec/build/bsps/riscv/riscv/bsprv64imafdc.yml new file mode 100644 index 0000000000..32a0837941 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv64imafdc.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv64imafdc +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv64imafdcmedany.yml b/spec/build/bsps/riscv/riscv/bsprv64imafdcmedany.yml new file mode 100644 index 0000000000..e4ecd4736a --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv64imafdcmedany.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv64imafdc_medany +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/bsprv64imafdmedany.yml b/spec/build/bsps/riscv/riscv/bsprv64imafdmedany.yml new file mode 100644 index 0000000000..9e01572c70 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/bsprv64imafdmedany.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: riscv +bsp: rv64imafd_medany +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: riscv +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/riscv/riscv/grp.yml b/spec/build/bsps/riscv/riscv/grp.yml new file mode 100644 index 0000000000..396f8986ec --- /dev/null +++ b/spec/build/bsps/riscv/riscv/grp.yml @@ -0,0 +1,58 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: group +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +enabled-by: true +includes: [] +install: [] +ldflags: [] +links: +- role: build-dependency + uid: ../../obj +- role: build-dependency + uid: ../../objirq +- role: build-dependency + uid: ../../optclang +- role: build-dependency + uid: ../../optconsolebaud +- role: build-dependency + uid: ../../optgcc +- role: build-dependency + uid: ../grp +- role: build-dependency + uid: ../optrambegin +- role: build-dependency + uid: ../optramsize +- role: build-dependency + uid: abi +- role: build-dependency + uid: obj +- role: build-dependency + uid: objsmp +- role: build-dependency + uid: optextirqmax +- role: build-dependency + uid: optfdtcpyro +- role: build-dependency + uid: optfdtmxsz +- role: build-dependency + uid: optfdtro +- role: build-dependency + uid: optfdtuboot +- role: build-dependency + uid: optfrdme310arty +- role: build-dependency + uid: opthtif +- role: build-dependency + uid: optns16550max +- role: build-dependency + uid: ../linkcmds +- role: build-dependency + uid: ../linkcmdsbase +- role: build-dependency + uid: ../start +- role: build-dependency + uid: ../../bspopts +type: build +use-after: [] +use-before: [] diff --git a/spec/build/bsps/riscv/riscv/obj.yml b/spec/build/bsps/riscv/riscv/obj.yml new file mode 100644 index 0000000000..c16dc226c7 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/obj.yml @@ -0,0 +1,41 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: objects +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +cxxflags: [] +enabled-by: true +includes: [] +install: +- destination: ${BSP_INCLUDEDIR} + source: + - bsps/riscv/riscv/include/bsp.h + - bsps/riscv/riscv/include/tm27.h +- destination: ${BSP_INCLUDEDIR}/bsp + source: + - bsps/riscv/riscv/include/bsp/fe310-uart.h + - bsps/riscv/riscv/include/bsp/irq.h + - bsps/riscv/riscv/include/bsp/riscv.h +- destination: ${BSP_INCLUDEDIR}/dev/serial + source: + - bsps/riscv/riscv/include/dev/serial/htif.h +links: [] +source: +- bsps/riscv/riscv/clock/clockdrv.c +- bsps/riscv/riscv/console/console-config.c +- bsps/riscv/riscv/console/fe310-uart.c +- bsps/riscv/riscv/console/htif.c +- bsps/riscv/riscv/irq/irq.c +- bsps/riscv/riscv/start/bsp_fatal_halt.c +- bsps/riscv/riscv/start/bspstart.c +- bsps/shared/cache/nocache.c +- bsps/shared/dev/btimer/btimer-cpucounter.c +- bsps/shared/dev/getentropy/getentropy-cpucounter.c +- bsps/shared/dev/serial/console-termios.c +- bsps/shared/irq/irq-default-handler.c +- bsps/shared/start/bsp-fdt.c +- bsps/shared/start/bspfatal-default.c +- bsps/shared/start/bspgetworkarea-default.c +- bsps/shared/start/bspreset-empty.c +type: build diff --git a/spec/build/bsps/riscv/riscv/objsmp.yml b/spec/build/bsps/riscv/riscv/objsmp.yml new file mode 100644 index 0000000000..46369f977e --- /dev/null +++ b/spec/build/bsps/riscv/riscv/objsmp.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: objects +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +cxxflags: [] +enabled-by: +- RTEMS_SMP +includes: [] +install: [] +links: [] +source: +- bsps/riscv/riscv/start/bspsmp.c +type: build diff --git a/spec/build/bsps/riscv/riscv/optextirqmax.yml b/spec/build/bsps/riscv/riscv/optextirqmax.yml new file mode 100644 index 0000000000..ffa84748b6 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/optextirqmax.yml @@ -0,0 +1,16 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 64 +default-by-variant: [] +description: | + maximum number of external interrupts supported by the BSP (default 64) +enabled-by: true +format: '{}' +links: [] +name: RISCV_MAXIMUM_EXTERNAL_INTERRUPTS +type: build diff --git a/spec/build/bsps/riscv/riscv/optfdtcpyro.yml b/spec/build/bsps/riscv/riscv/optfdtcpyro.yml new file mode 100644 index 0000000000..c26b1ae051 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/optfdtcpyro.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: true +default-by-variant: [] +description: | + copy the FDT blob into the read-only load area via bsp_fdt_copy() +enabled-by: true +links: [] +name: BSP_FDT_BLOB_COPY_TO_READ_ONLY_LOAD_AREA +type: build diff --git a/spec/build/bsps/riscv/riscv/optfdtmxsz.yml b/spec/build/bsps/riscv/riscv/optfdtmxsz.yml new file mode 100644 index 0000000000..63a42f5a29 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/optfdtmxsz.yml @@ -0,0 +1,16 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 65536 +default-by-variant: [] +description: | + maximum size of the FDT blob in bytes +enabled-by: true +format: '{}' +links: [] +name: BSP_FDT_BLOB_SIZE_MAX +type: build diff --git a/spec/build/bsps/riscv/riscv/optfdtro.yml b/spec/build/bsps/riscv/riscv/optfdtro.yml new file mode 100644 index 0000000000..a61bb2924b --- /dev/null +++ b/spec/build/bsps/riscv/riscv/optfdtro.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: true +default-by-variant: [] +description: | + place the FDT blob into the read-only data area +enabled-by: true +links: [] +name: BSP_FDT_BLOB_READ_ONLY +type: build diff --git a/spec/build/bsps/riscv/riscv/optfdtuboot.yml b/spec/build/bsps/riscv/riscv/optfdtuboot.yml new file mode 100644 index 0000000000..5805e912ff --- /dev/null +++ b/spec/build/bsps/riscv/riscv/optfdtuboot.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: true +default-by-variant: [] +description: | + copy the U-Boot provided FDT to an internal storage +enabled-by: true +links: [] +name: BSP_START_COPY_FDT_FROM_U_BOOT +type: build diff --git a/spec/build/bsps/riscv/riscv/optfrdme310arty.yml b/spec/build/bsps/riscv/riscv/optfrdme310arty.yml new file mode 100644 index 0000000000..0623694cca --- /dev/null +++ b/spec/build/bsps/riscv/riscv/optfrdme310arty.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: false +default-by-variant: +- value: true + variants: + - riscv/frdme310arty.* +description: | + enables support sifive Freedom E310 Arty board if defined to a non-zero value,otherwise it is disabled (disabled by default) +enabled-by: true +links: [] +name: RISCV_ENABLE_FRDME310ARTY_SUPPORT +type: build diff --git a/spec/build/bsps/riscv/riscv/opthtif.yml b/spec/build/bsps/riscv/riscv/opthtif.yml new file mode 100644 index 0000000000..9161716869 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/opthtif.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: false +default-by-variant: [] +description: | + enables the HTIF support if defined to a non-zero value, otherwise it is disabled (disabled by default) +enabled-by: true +links: [] +name: RISCV_ENABLE_HTIF_SUPPORT +type: build diff --git a/spec/build/bsps/riscv/riscv/optns16550max.yml b/spec/build/bsps/riscv/riscv/optns16550max.yml new file mode 100644 index 0000000000..7e385a57b7 --- /dev/null +++ b/spec/build/bsps/riscv/riscv/optns16550max.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 2 +default-by-variant: +- value: null + variants: + - riscv/frdme310arty.* +description: | + maximum number of NS16550 devices supported by the console driver (2 by default) +enabled-by: true +format: '{}' +links: [] +name: RISCV_CONSOLE_MAX_NS16550_DEVICES +type: build |