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-rw-r--r--spec/build/bsps/powerpc/virtex4/optppccachedata.yml8
1 files changed, 4 insertions, 4 deletions
diff --git a/spec/build/bsps/powerpc/virtex4/optppccachedata.yml b/spec/build/bsps/powerpc/virtex4/optppccachedata.yml
index 9ccbf7cf79..35e68c415e 100644
--- a/spec/build/bsps/powerpc/virtex4/optppccachedata.yml
+++ b/spec/build/bsps/powerpc/virtex4/optppccachedata.yml
@@ -4,10 +4,10 @@ actions:
- define-condition: null
build-type: option
copyrights:
-- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-family: []
-default-by-variant: []
+- Copyright (C) 2020 embedded brains GmbH & Co. KG
+default:
+- enabled-by: true
+ value: true
description: |
If defined, then the PowerPC specific code in RTEMS will use data cache instructions to optimize the context switch code. This code can conflict with debuggers or emulators. It is known to break the Corelis PowerPC emulator with at least some combinations of PowerPC 603e revisions and emulator versions. The BSP actually contains the call that enables this.
enabled-by: true