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Diffstat (limited to '')
| -rw-r--r-- | spec/build/bsps/arm/xilinx-zynqmp-rpu/optclkfastidle.yml | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/optclkfastidle.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optclkfastidle.yml new file mode 100644 index 0000000000..f0b83e1402 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optclkfastidle.yml @@ -0,0 +1,21 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965_qemu + - arm/realview_pbx_a9_qemu + - arm/xilinx_zynq_a9_qemu + value: true +- enabled-by: true + value: false +description: | + This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times. +enabled-by: true +links: [] +name: CLOCK_DRIVER_USE_FAST_IDLE +type: build |