summaryrefslogtreecommitdiffstats
path: root/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml
diff options
context:
space:
mode:
Diffstat (limited to '')
-rw-r--r--spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml19
1 files changed, 4 insertions, 15 deletions
diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml
index 6fe6c18dfa..e2798548a6 100644
--- a/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml
+++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml
@@ -5,21 +5,10 @@ actions:
build-type: option
copyrights:
- Copyright (C) 2021 On-Line Applications Research (OAR)
-- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 111111111
-default-by-variant:
-- value: 111111111
- variants:
- - aarch64/xilinx_zynqmp_ilp32_qemu.*
-- value: 111111111
- variants:
- - aarch64/xilinx_zynqmp_ilp32_zu3eg.*
-- value: 111111111
- variants:
- - aarch64/xilinx_zynqmp_lp64_qemu.*
-- value: 111111111
- variants:
- - aarch64/xilinx_zynqmp_lp64_zu3eg.*
+- Copyright (C) 2020 embedded brains GmbH & Co. KG
+default:
+- enabled-by: true
+ value: 111111111
description: |
ZynqMP i2c1 clock frequency in Hz. This is the frequency after the signal
has been processed using the values passed to the I2C1_REF_CTRL register.