diff options
Diffstat (limited to 'make/custom/score603e.cfg')
| -rw-r--r-- | make/custom/score603e.cfg | 56 |
1 files changed, 2 insertions, 54 deletions
diff --git a/make/custom/score603e.cfg b/make/custom/score603e.cfg index 6f201ea304..0dcc166fe9 100644 --- a/make/custom/score603e.cfg +++ b/make/custom/score603e.cfg @@ -7,67 +7,15 @@ # $Id$ # +include $(RTEMS_ROOT)/make/custom/default.cfg + RTEMS_CPU=powerpc RTEMS_CPU_MODEL=ppc603e -# Set the default generation if it has not been overridden -ifeq ($(SCORE603E_GENERATION),) -SCORE603E_GENERATION=2 -endif - # This is the actual bsp directory used during the build process. RTEMS_BSP_FAMILY=score603e -ifeq ($(SCORE603E_GENERATION),1) -RTEMS_BSP=score603e_g1 - -else -ifeq ($(SCORE603E_GENERATION),2) -RTEMS_BSP=score603e - -endif # generation 2 -endif # generation 1 - -include $(RTEMS_ROOT)/make/custom/default.cfg - -# This section makes the target dependent options file. - -# SCORE603E_USE_SDS (score603e_bsp) -# SCORE603E_USE_OPEN_FIRMWARE (score603e_bsp) -# SCORE603E_USE_NONE (score603e_bsp) -# The Score603e board can be configured with 3 ROM monitors. Only two -# are appropriate for use with RTEMS. Set exactly one of these to "1" -# to indicate which ROM monitor is on the board you are using. -# -# PPC_VECTOR_FILE_BASE (ppc) -# This defines the base address of the exception table. -# NOTE: Vectors are actually at 0xFFF00000 but file starts at offset 0x0100 -# -# PPC_USE_SPRG (RTEMS PowerPC port) -# If defined, then the PowerPC specific code in RTEMS will use some -# of the special purpose registers to slightly optimize interrupt -# response time. The use of these registers can conflict with -# other tools like debuggers. -# -# PPC_USE_DATA_CACHE (RTEMS PowerPC port) -# If defined, then the PowerPC specific code in RTEMS will use -# data cache instructions to optimize the context switch code. -# This code can conflict with debuggers or emulators. -# - -define make-target-options - @echo "#define INITIALIZE_COM_PORTS 1" >>$@ - @echo "#define SCORE603E_GENERATION $(SCORE603E_GENERATION)" >>$@ - @echo "#define SCORE603E_USE_SDS 0" >>$@ - @echo "#define SCORE603E_USE_NONE 0" >>$@ - @echo "#define SCORE603E_USE_DINK 1" >>$@ - @echo "#define SCORE603E_USE_OPEN_FIRMWARE 0" >>$@ - @echo "#define PPC_USE_DATA_CACHE 0" >>$@ - @echo "#define PPC_VECTOR_FILE_BASE 0x0100" >>$@ - @echo "#define PPC_USE_SPRG 0" >>$@ - @echo "#define HAS_PMC_PSC8 0" >>$@ -endef # This contains the compiler options necessary to select the CPU model # and (hopefully) optimize for it. |