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-rw-r--r--make/custom/dmv177.cfg33
1 files changed, 0 insertions, 33 deletions
diff --git a/make/custom/dmv177.cfg b/make/custom/dmv177.cfg
index 05fb516a58..595279a8a0 100644
--- a/make/custom/dmv177.cfg
+++ b/make/custom/dmv177.cfg
@@ -16,39 +16,6 @@ RTEMS_CPU_MODEL=ppc603e
# This is the actual bsp directory used during the build process.
RTEMS_BSP_FAMILY=dmv177
-# This section makes the target dependent options file.
-
-# PPC_VECTOR_FILE_BASE (ppc)
-# This defines the base address of the exception table.
-# NOTE: Vectors are actually at 0xFFF00000 but file starts at offset 0x0100
-#
-# PPC_USE_SPRG (RTEMS PowerPC port)
-# If defined, then the PowerPC specific code in RTEMS will use some
-# of the special purpose registers to slightly optimize interrupt
-# response time. The use of these registers can conflict with
-# other tools like debuggers.
-#
-# PPC_USE_DATA_CACHE (RTEMS PowerPC port/BSP)
-# If defined, then the PowerPC specific code in RTEMS will use
-# data cache instructions to optimize the context switch code.
-# This code can conflict with debuggers or emulators. It is known
-# to break the Corelis PowerPC emulator with at least some combinations
-# of PowerPC 603e revisions and emulator versions.
-# The BSP actually contains the call that enables this.
-#
-# PPC_USE_INSTRUCTION_CACHE (RTEMS PowerPC port/BSP)
-# If defined, then the PowerPC specific code in RTEMS will use
-# data cache instructions to optimize the context switch code.
-# This code can conflict with debuggers or emulators.
-# The BSP actually contains the call that enables this.
-
-define make-target-options
- @echo "#define PPC_VECTOR_FILE_BASE 0x0100" >>$@
- @echo "#define PPC_USE_SPRG 0" >>$@
- @echo "#define PPC_USE_DATA_CACHE 0" >>$@
- @echo "#define PPC_USE_INSTRUCTION_CACHE 1" >>$@
-endef
-
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#