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Diffstat (limited to '')
| -rw-r--r-- | doc/supplements/powerpc/timePSIM.t | 45 |
1 files changed, 0 insertions, 45 deletions
diff --git a/doc/supplements/powerpc/timePSIM.t b/doc/supplements/powerpc/timePSIM.t index f5ea26e7fc..520cb6df64 100644 --- a/doc/supplements/powerpc/timePSIM.t +++ b/doc/supplements/powerpc/timePSIM.t @@ -13,36 +13,8 @@ \global\advance \smallskipamount by -4pt @end tex -@ifinfo -@node RTEMS_BSP Timing Data, RTEMS_BSP Timing Data Introduction, Timing Specification Terminology, Top -@end ifinfo @chapter RTEMS_BSP Timing Data -@ifinfo -@menu -* RTEMS_BSP Timing Data Introduction:: -* RTEMS_BSP Timing Data Hardware Platform:: -* RTEMS_BSP Timing Data Interrupt Latency:: -* RTEMS_BSP Timing Data Context Switch:: -* RTEMS_BSP Timing Data Directive Times:: -* RTEMS_BSP Timing Data Task Manager:: -* RTEMS_BSP Timing Data Interrupt Manager:: -* RTEMS_BSP Timing Data Clock Manager:: -* RTEMS_BSP Timing Data Timer Manager:: -* RTEMS_BSP Timing Data Semaphore Manager:: -* RTEMS_BSP Timing Data Message Manager:: -* RTEMS_BSP Timing Data Event Manager:: -* RTEMS_BSP Timing Data Signal Manager:: -* RTEMS_BSP Timing Data Partition Manager:: -* RTEMS_BSP Timing Data Region Manager:: -* RTEMS_BSP Timing Data Dual-Ported Memory Manager:: -* RTEMS_BSP Timing Data I/O Manager:: -* RTEMS_BSP Timing Data Rate Monotonic Manager:: -@end menu -@end ifinfo -@ifinfo -@node RTEMS_BSP Timing Data Introduction, RTEMS_BSP Timing Data Hardware Platform, RTEMS_BSP Timing Data, RTEMS_BSP Timing Data -@end ifinfo @section Introduction The timing data for RTEMS on the RTEMS_BSP target @@ -54,9 +26,6 @@ provided. Also, provided is a description of the interrupt latency and the context switch times as they pertain to the PowerPC version of RTEMS. -@ifinfo -@node RTEMS_BSP Timing Data Hardware Platform, RTEMS_BSP Timing Data Interrupt Latency, RTEMS_BSP Timing Data Introduction, RTEMS_BSP Timing Data -@end ifinfo @section Hardware Platform All times reported in this chapter were measured using the PowerPC @@ -75,9 +44,6 @@ executed. All sources of hardware interrupts were disabled, although traps were enabled and the interrupt level of the PowerPC allows all interrupts. -@ifinfo -@node RTEMS_BSP Timing Data Interrupt Latency, RTEMS_BSP Timing Data Context Switch, RTEMS_BSP Timing Data Hardware Platform, RTEMS_BSP Timing Data -@end ifinfo @section Interrupt Latency The maximum period with traps disabled or the @@ -105,9 +71,6 @@ generated on the RTEMS_BSP benchmark platform using the PowerPC's decrementer register. This register was programmed to generate an interrupt after one countdown. -@ifinfo -@node RTEMS_BSP Timing Data Context Switch, RTEMS_BSP Timing Data Directive Times, RTEMS_BSP Timing Data Interrupt Latency, RTEMS_BSP Timing Data -@end ifinfo @section Context Switch The RTEMS processor context switch time is RTEMS_NO_FP_CONTEXTS @@ -132,11 +95,3 @@ the numeric coprocessor. The following table summarizes the context switch times for the RTEMS_BSP benchmark platform: - -@include timetbl.texi - -@tex -\global\advance \smallskipamount by 4pt -@end tex - - |