summaryrefslogtreecommitdiffstats
path: root/doc/supplements/m68k
diff options
context:
space:
mode:
Diffstat (limited to 'doc/supplements/m68k')
-rw-r--r--doc/supplements/m68k/MVME136_TIMES1
-rw-r--r--doc/supplements/m68k/Makefile2
-rw-r--r--doc/supplements/m68k/m68k.texi4
-rw-r--r--doc/supplements/m68k/timeMVME136.t48
-rw-r--r--doc/supplements/m68k/timedata.t48
5 files changed, 52 insertions, 51 deletions
diff --git a/doc/supplements/m68k/MVME136_TIMES b/doc/supplements/m68k/MVME136_TIMES
index 0a6bbf0a2a..5b0dfe6fda 100644
--- a/doc/supplements/m68k/MVME136_TIMES
+++ b/doc/supplements/m68k/MVME136_TIMES
@@ -7,6 +7,7 @@
#
# CPU Model Information
#
+RTEMS_BSP MVME136
RTEMS_CPU_MODEL MC68020
#
# Interrupt Latency
diff --git a/doc/supplements/m68k/Makefile b/doc/supplements/m68k/Makefile
index 8b89443af2..bca8ad96e5 100644
--- a/doc/supplements/m68k/Makefile
+++ b/doc/supplements/m68k/Makefile
@@ -61,7 +61,7 @@ timedata.texi: timedata.t MVME136_TIMES
wksheets.t: ../../common/wksheets.t
sed -e 's/WORKSHEETS_PREVIOUS_LINK/Processor Dependent Information Table CPU Dependent Information Table/' \
- -e 's/WORKSHEETS_NEXT_LINK/MC68020 Timing Data/' \
+ -e 's/WORKSHEETS_NEXT_LINK/MVME136 Timing Data/' \
<../../common/wksheets.t >wksheets.t
wksheets.texi: wksheets.t MVME136_TIMES
diff --git a/doc/supplements/m68k/m68k.texi b/doc/supplements/m68k/m68k.texi
index 9f315209e9..20273ae631 100644
--- a/doc/supplements/m68k/m68k.texi
+++ b/doc/supplements/m68k/m68k.texi
@@ -92,7 +92,7 @@ Applications Supplement.
* Processor Dependent Information Table::
* Memory Requirements::
* Timing Specification::
-* MC68020 Timing Data::
+* MVME136 Timing Data::
* Command and Variable Index::
* Concept Index::
@end menu
@@ -103,7 +103,7 @@ Applications Supplement.
@c Need to copy the emacs stuff and "trailer stuff" (index, toc) into here
@c
-@node Command and Variable Index, Concept Index, MC68020 Timing Data Rate Monotonic Manager, Top
+@node Command and Variable Index, Concept Index, MVME136 Timing Data Rate Monotonic Manager, Top
@unnumbered Command and Variable Index
There are currently no Command and Variable Index entries.
diff --git a/doc/supplements/m68k/timeMVME136.t b/doc/supplements/m68k/timeMVME136.t
index dd790bf844..a0d5ed835f 100644
--- a/doc/supplements/m68k/timeMVME136.t
+++ b/doc/supplements/m68k/timeMVME136.t
@@ -12,34 +12,34 @@
@end tex
@ifinfo
-@node MC68020 Timing Data, MC68020 Timing Data Introduction, Memory Requirements RTEMS RAM Workspace Worksheet, Top
+@node MVME136 Timing Data, MVME136 Timing Data Introduction, Memory Requirements RTEMS RAM Workspace Worksheet, Top
@end ifinfo
-@chapter MC68020 Timing Data
+@chapter MVME136 Timing Data
@ifinfo
@menu
-* MC68020 Timing Data Introduction::
-* MC68020 Timing Data Hardware Platform::
-* MC68020 Timing Data Interrupt Latency::
-* MC68020 Timing Data Context Switch::
-* MC68020 Timing Data Directive Times::
-* MC68020 Timing Data Task Manager::
-* MC68020 Timing Data Interrupt Manager::
-* MC68020 Timing Data Clock Manager::
-* MC68020 Timing Data Timer Manager::
-* MC68020 Timing Data Semaphore Manager::
-* MC68020 Timing Data Message Manager::
-* MC68020 Timing Data Event Manager::
-* MC68020 Timing Data Signal Manager::
-* MC68020 Timing Data Partition Manager::
-* MC68020 Timing Data Region Manager::
-* MC68020 Timing Data Dual-Ported Memory Manager::
-* MC68020 Timing Data I/O Manager::
-* MC68020 Timing Data Rate Monotonic Manager::
+* MVME136 Timing Data Introduction::
+* MVME136 Timing Data Hardware Platform::
+* MVME136 Timing Data Interrupt Latency::
+* MVME136 Timing Data Context Switch::
+* MVME136 Timing Data Directive Times::
+* MVME136 Timing Data Task Manager::
+* MVME136 Timing Data Interrupt Manager::
+* MVME136 Timing Data Clock Manager::
+* MVME136 Timing Data Timer Manager::
+* MVME136 Timing Data Semaphore Manager::
+* MVME136 Timing Data Message Manager::
+* MVME136 Timing Data Event Manager::
+* MVME136 Timing Data Signal Manager::
+* MVME136 Timing Data Partition Manager::
+* MVME136 Timing Data Region Manager::
+* MVME136 Timing Data Dual-Ported Memory Manager::
+* MVME136 Timing Data I/O Manager::
+* MVME136 Timing Data Rate Monotonic Manager::
@end menu
@end ifinfo
@ifinfo
-@node MC68020 Timing Data Introduction, MC68020 Timing Data Hardware Platform, MC68020 Timing Data, MC68020 Timing Data
+@node MVME136 Timing Data Introduction, MVME136 Timing Data Hardware Platform, MVME136 Timing Data, MVME136 Timing Data
@end ifinfo
@section Introduction
@@ -52,7 +52,7 @@ is a description of the interrupt latency and the context switch
times as they pertain to the MC68020 version of RTEMS.
@ifinfo
-@node MC68020 Timing Data Hardware Platform, MC68020 Timing Data Interrupt Latency, MC68020 Timing Data Introduction, MC68020 Timing Data
+@node MVME136 Timing Data Hardware Platform, MVME136 Timing Data Interrupt Latency, MVME136 Timing Data Introduction, MVME136 Timing Data
@end ifinfo
@section Hardware Platform
@@ -78,7 +78,7 @@ MC68020 assume that the internal cache is disabled and that no
instructions overlap.
@ifinfo
-@node MC68020 Timing Data Interrupt Latency, MC68020 Timing Data Context Switch, MC68020 Timing Data Hardware Platform, MC68020 Timing Data
+@node MVME136 Timing Data Interrupt Latency, MVME136 Timing Data Context Switch, MVME136 Timing Data Hardware Platform, MVME136 Timing Data
@end ifinfo
@section Interrupt Latency
@@ -105,7 +105,7 @@ using the Multiprocessing Communications registers to generate
as the interrupt source.
@ifinfo
-@node MC68020 Timing Data Context Switch, MC68020 Timing Data Directive Times, MC68020 Timing Data Interrupt Latency, MC68020 Timing Data
+@node MVME136 Timing Data Context Switch, MVME136 Timing Data Directive Times, MVME136 Timing Data Interrupt Latency, MVME136 Timing Data
@end ifinfo
@section Context Switch
diff --git a/doc/supplements/m68k/timedata.t b/doc/supplements/m68k/timedata.t
index dd790bf844..a0d5ed835f 100644
--- a/doc/supplements/m68k/timedata.t
+++ b/doc/supplements/m68k/timedata.t
@@ -12,34 +12,34 @@
@end tex
@ifinfo
-@node MC68020 Timing Data, MC68020 Timing Data Introduction, Memory Requirements RTEMS RAM Workspace Worksheet, Top
+@node MVME136 Timing Data, MVME136 Timing Data Introduction, Memory Requirements RTEMS RAM Workspace Worksheet, Top
@end ifinfo
-@chapter MC68020 Timing Data
+@chapter MVME136 Timing Data
@ifinfo
@menu
-* MC68020 Timing Data Introduction::
-* MC68020 Timing Data Hardware Platform::
-* MC68020 Timing Data Interrupt Latency::
-* MC68020 Timing Data Context Switch::
-* MC68020 Timing Data Directive Times::
-* MC68020 Timing Data Task Manager::
-* MC68020 Timing Data Interrupt Manager::
-* MC68020 Timing Data Clock Manager::
-* MC68020 Timing Data Timer Manager::
-* MC68020 Timing Data Semaphore Manager::
-* MC68020 Timing Data Message Manager::
-* MC68020 Timing Data Event Manager::
-* MC68020 Timing Data Signal Manager::
-* MC68020 Timing Data Partition Manager::
-* MC68020 Timing Data Region Manager::
-* MC68020 Timing Data Dual-Ported Memory Manager::
-* MC68020 Timing Data I/O Manager::
-* MC68020 Timing Data Rate Monotonic Manager::
+* MVME136 Timing Data Introduction::
+* MVME136 Timing Data Hardware Platform::
+* MVME136 Timing Data Interrupt Latency::
+* MVME136 Timing Data Context Switch::
+* MVME136 Timing Data Directive Times::
+* MVME136 Timing Data Task Manager::
+* MVME136 Timing Data Interrupt Manager::
+* MVME136 Timing Data Clock Manager::
+* MVME136 Timing Data Timer Manager::
+* MVME136 Timing Data Semaphore Manager::
+* MVME136 Timing Data Message Manager::
+* MVME136 Timing Data Event Manager::
+* MVME136 Timing Data Signal Manager::
+* MVME136 Timing Data Partition Manager::
+* MVME136 Timing Data Region Manager::
+* MVME136 Timing Data Dual-Ported Memory Manager::
+* MVME136 Timing Data I/O Manager::
+* MVME136 Timing Data Rate Monotonic Manager::
@end menu
@end ifinfo
@ifinfo
-@node MC68020 Timing Data Introduction, MC68020 Timing Data Hardware Platform, MC68020 Timing Data, MC68020 Timing Data
+@node MVME136 Timing Data Introduction, MVME136 Timing Data Hardware Platform, MVME136 Timing Data, MVME136 Timing Data
@end ifinfo
@section Introduction
@@ -52,7 +52,7 @@ is a description of the interrupt latency and the context switch
times as they pertain to the MC68020 version of RTEMS.
@ifinfo
-@node MC68020 Timing Data Hardware Platform, MC68020 Timing Data Interrupt Latency, MC68020 Timing Data Introduction, MC68020 Timing Data
+@node MVME136 Timing Data Hardware Platform, MVME136 Timing Data Interrupt Latency, MVME136 Timing Data Introduction, MVME136 Timing Data
@end ifinfo
@section Hardware Platform
@@ -78,7 +78,7 @@ MC68020 assume that the internal cache is disabled and that no
instructions overlap.
@ifinfo
-@node MC68020 Timing Data Interrupt Latency, MC68020 Timing Data Context Switch, MC68020 Timing Data Hardware Platform, MC68020 Timing Data
+@node MVME136 Timing Data Interrupt Latency, MVME136 Timing Data Context Switch, MVME136 Timing Data Hardware Platform, MVME136 Timing Data
@end ifinfo
@section Interrupt Latency
@@ -105,7 +105,7 @@ using the Multiprocessing Communications registers to generate
as the interrupt source.
@ifinfo
-@node MC68020 Timing Data Context Switch, MC68020 Timing Data Directive Times, MC68020 Timing Data Interrupt Latency, MC68020 Timing Data
+@node MVME136 Timing Data Context Switch, MVME136 Timing Data Directive Times, MVME136 Timing Data Interrupt Latency, MVME136 Timing Data
@end ifinfo
@section Context Switch
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-24 14:11:57 +0000