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-rw-r--r--cpukit/include/rtems/confdefs.h54
-rw-r--r--cpukit/include/rtems/config.h35
-rw-r--r--cpukit/include/rtems/score/percpu.h53
-rw-r--r--cpukit/libmisc/stackchk/check.c2
-rw-r--r--cpukit/score/cpu/arm/include/rtems/score/cpu.h6
-rw-r--r--cpukit/score/cpu/bfin/cpu.c14
-rw-r--r--cpukit/score/cpu/bfin/include/rtems/score/cpu.h91
-rw-r--r--cpukit/score/cpu/epiphany/cpu.c5
-rw-r--r--cpukit/score/cpu/epiphany/include/rtems/score/cpu.h73
-rw-r--r--cpukit/score/cpu/i386/include/rtems/score/cpu.h8
-rw-r--r--cpukit/score/cpu/lm32/cpu.c12
-rw-r--r--cpukit/score/cpu/lm32/include/rtems/score/cpu.h90
-rw-r--r--cpukit/score/cpu/lm32/irq.c8
-rw-r--r--cpukit/score/cpu/m32c/cpu.c12
-rw-r--r--cpukit/score/cpu/m32c/cpu_asm.c12
-rw-r--r--cpukit/score/cpu/m32c/include/rtems/score/cpu.h93
-rw-r--r--cpukit/score/cpu/m68k/cpu.c26
-rw-r--r--cpukit/score/cpu/m68k/cpu_asm.S8
-rw-r--r--cpukit/score/cpu/m68k/include/rtems/score/cpu.h22
-rw-r--r--cpukit/score/cpu/mips/cpu.c5
-rw-r--r--cpukit/score/cpu/mips/cpu_asm.S10
-rw-r--r--cpukit/score/cpu/mips/include/rtems/score/cpu.h65
-rw-r--r--cpukit/score/cpu/moxie/cpu.c7
-rw-r--r--cpukit/score/cpu/moxie/include/rtems/score/cpu.h77
-rw-r--r--cpukit/score/cpu/nios2/include/rtems/score/cpu.h6
-rw-r--r--cpukit/score/cpu/nios2/nios2-iic-irq.c8
-rw-r--r--cpukit/score/cpu/no_cpu/cpu.c12
-rw-r--r--cpukit/score/cpu/no_cpu/cpu_asm.c12
-rw-r--r--cpukit/score/cpu/no_cpu/include/rtems/score/cpu.h93
-rw-r--r--cpukit/score/cpu/or1k/cpu.c4
-rw-r--r--cpukit/score/cpu/or1k/include/rtems/score/cpu.h73
-rw-r--r--cpukit/score/cpu/powerpc/include/rtems/score/cpu.h54
-rw-r--r--cpukit/score/cpu/riscv/cpu.c5
-rw-r--r--cpukit/score/cpu/riscv/include/rtems/score/cpu.h15
-rw-r--r--cpukit/score/cpu/sh/include/rtems/score/cpu.h43
-rw-r--r--cpukit/score/cpu/sparc/include/rtems/score/cpu.h34
-rw-r--r--cpukit/score/cpu/sparc64/include/rtems/score/cpu.h32
-rw-r--r--cpukit/score/cpu/v850/cpu_asm.S73
-rw-r--r--cpukit/score/cpu/v850/include/rtems/score/cpu.h78
-rw-r--r--cpukit/score/src/isr.c64
-rw-r--r--cpukit/score/src/percpuasm.c23
41 files changed, 142 insertions, 1275 deletions
diff --git a/cpukit/include/rtems/confdefs.h b/cpukit/include/rtems/confdefs.h
index 7f3ffdff0d..e56826af5a 100644
--- a/cpukit/include/rtems/confdefs.h
+++ b/cpukit/include/rtems/confdefs.h
@@ -1182,12 +1182,13 @@ extern rtems_initialization_tasks_table Initialization_tasks[];
#error "CONFIGURE_IDLE_TASK_STACK_SIZE less than CONFIGURE_MINIMUM_TASK_STACK_SIZE"
#endif
-/**
- * @brief Interrupt stack size configuration.
+/*
+ * Interrupt stack configuration.
*
* By default, the interrupt stack will be of minimum size.
* The BSP or application may override this value.
*/
+
#ifndef CONFIGURE_INTERRUPT_STACK_SIZE
#ifdef BSP_INTERRUPT_STACK_SIZE
#define CONFIGURE_INTERRUPT_STACK_SIZE BSP_INTERRUPT_STACK_SIZE
@@ -1196,18 +1197,23 @@ extern rtems_initialization_tasks_table Initialization_tasks[];
#endif
#endif
-/**
- * This reserves memory for the interrupt stack if it is to be allocated
- * by RTEMS rather than the BSP.
- *
- * @todo Try to get to the point where all BSPs support allocating the
- * memory from the Workspace.
- */
-#if (CPU_ALLOCATE_INTERRUPT_STACK == 0)
- #define _CONFIGURE_INTERRUPT_STACK_MEMORY 0
-#else
- #define _CONFIGURE_INTERRUPT_STACK_MEMORY \
- _Configure_From_workspace( CONFIGURE_INTERRUPT_STACK_SIZE )
+#if CONFIGURE_INTERRUPT_STACK_SIZE % CPU_INTERRUPT_STACK_ALIGNMENT != 0
+ #error "CONFIGURE_INTERRUPT_STACK_SIZE fails to meet the CPU port interrupt stack alignment"
+#endif
+
+#ifdef CONFIGURE_INIT
+ RTEMS_DEFINE_GLOBAL_SYMBOL(
+ _Configuration_Interrupt_stack_size,
+ CONFIGURE_INTERRUPT_STACK_SIZE
+ );
+
+ char _Configuration_Interrupt_stack_area_begin[
+ CONFIGURE_MAXIMUM_PROCESSORS * CONFIGURE_INTERRUPT_STACK_SIZE
+ ] RTEMS_ALIGNED( CPU_INTERRUPT_STACK_ALIGNMENT )
+ RTEMS_SECTION( ".rtemsstack.interrupt.begin" );
+
+ const char _Configuration_Interrupt_stack_area_end[ 0 ]
+ RTEMS_SECTION( ".rtemsstack.interrupt.end" ) = { };
#endif
/**
@@ -2720,9 +2726,7 @@ extern rtems_initialization_tasks_table Initialization_tasks[];
* This macro accounts for general RTEMS system overhead.
*/
#define _CONFIGURE_MEMORY_FOR_SYSTEM_OVERHEAD \
- ( _CONFIGURE_MEMORY_FOR_INTERNAL_TASKS + \
- _CONFIGURE_INTERRUPT_STACK_MEMORY \
- )
+ _CONFIGURE_MEMORY_FOR_INTERNAL_TASKS
/**
* This macro reserves the memory required by the statically configured
@@ -2752,18 +2756,6 @@ extern rtems_initialization_tasks_table Initialization_tasks[];
_CONFIGURE_MEMORY_FOR_USER_EXTENSIONS(CONFIGURE_MAXIMUM_USER_EXTENSIONS) \
)
-/*
- * This macro provides a summation of the memory required by SMP as configured.
- */
-#if defined(RTEMS_SMP)
- #define _CONFIGURE_MEMORY_FOR_SMP \
- (CONFIGURE_MAXIMUM_PROCESSORS * \
- _Configure_From_workspace( CONFIGURE_INTERRUPT_STACK_SIZE ) \
- )
-#else
- #define _CONFIGURE_MEMORY_FOR_SMP 0
-#endif
-
/**
* This calculates the memory required for the executive workspace.
*
@@ -2783,7 +2775,6 @@ extern rtems_initialization_tasks_table Initialization_tasks[];
_CONFIGURE_MEMORY_FOR_POSIX + \
_CONFIGURE_MEMORY_FOR_STATIC_EXTENSIONS + \
_CONFIGURE_MEMORY_FOR_MP + \
- _CONFIGURE_MEMORY_FOR_SMP + \
CONFIGURE_MESSAGE_BUFFER_MEMORY + \
(CONFIGURE_MEMORY_OVERHEAD * 1024) + \
_CONFIGURE_HEAP_HANDLER_OVERHEAD \
@@ -3082,7 +3073,6 @@ extern rtems_initialization_tasks_table Initialization_tasks[];
CONFIGURE_TICKS_PER_TIMESLICE, /* ticks per timeslice quantum */
CONFIGURE_IDLE_TASK_BODY, /* user's IDLE task */
CONFIGURE_IDLE_TASK_STACK_SIZE, /* IDLE task stack size */
- CONFIGURE_INTERRUPT_STACK_SIZE, /* interrupt stack size */
CONFIGURE_TASK_STACK_ALLOCATOR_INIT, /* stack allocator init */
CONFIGURE_TASK_STACK_ALLOCATOR, /* stack allocator */
CONFIGURE_TASK_STACK_DEALLOCATOR, /* stack deallocator */
@@ -3239,7 +3229,6 @@ extern rtems_initialization_tasks_table Initialization_tasks[];
uint32_t POSIX;
/* System overhead pieces */
- uint32_t INTERRUPT_STACK_MEMORY;
uint32_t MEMORY_FOR_IDLE_TASK;
/* Classic API Pieces */
@@ -3288,7 +3277,6 @@ extern rtems_initialization_tasks_table Initialization_tasks[];
_CONFIGURE_MEMORY_FOR_POSIX,
/* System overhead pieces */
- _CONFIGURE_INTERRUPT_STACK_MEMORY,
_CONFIGURE_MEMORY_FOR_INTERNAL_TASKS,
/* Classic API Pieces */
diff --git a/cpukit/include/rtems/config.h b/cpukit/include/rtems/config.h
index 6b97376511..248ace0721 100644
--- a/cpukit/include/rtems/config.h
+++ b/cpukit/include/rtems/config.h
@@ -184,13 +184,6 @@ typedef struct {
*/
uint32_t idle_task_stack_size;
- /**
- * This field specifies the size of the interrupt stack. If less than or
- * equal to the minimum stack size, then the interrupt stack will be of
- * minimum stack size.
- */
- uint32_t interrupt_stack_size;
-
/**
* @brief Optional task stack allocator initialization hook.
*/
@@ -313,8 +306,34 @@ extern const rtems_configuration_table Configuration;
#define rtems_configuration_get_idle_task_stack_size() \
(Configuration.idle_task_stack_size)
+/**
+ * @brief Global symbol with a value equal to the configure interrupt stack size.
+ *
+ * This global symbol is defined by the application configuration option
+ * CONFIGURE_INIT_TASK_STACK_SIZE via <rtems/confdefs.h>.
+ */
+RTEMS_DECLARE_GLOBAL_SYMBOL( _Configuration_Interrupt_stack_size );
+
+/**
+ * @brief The interrupt stack area begin.
+ *
+ * The interrupt stack area is defined by the application configuration via
+ * <rtems/confdefs.h>. The size of the area depends on
+ * CONFIGURE_INIT_TASK_STACK_SIZE and CONFIGURE_MAXIMUM_PROCESSORS.
+ */
+extern char _Configuration_Interrupt_stack_area_begin[];
+
+/**
+ * @brief The interrupt stack area end.
+ *
+ * The interrupt stack area is defined by the application configuration via
+ * <rtems/confdefs.h>. The size of the area depends on
+ * CONFIGURE_INIT_TASK_STACK_SIZE and CONFIGURE_MAXIMUM_PROCESSORS.
+ */
+extern const char _Configuration_Interrupt_stack_area_end[];
+
#define rtems_configuration_get_interrupt_stack_size() \
- (Configuration.interrupt_stack_size)
+ ((size_t) _Configuration_Interrupt_stack_size)
#define rtems_configuration_get_stack_allocate_init_hook() \
(Configuration.stack_allocate_init_hook)
diff --git a/cpukit/include/rtems/score/percpu.h b/cpukit/include/rtems/score/percpu.h
index 7d0a6c06bf..4a8353db47 100644
--- a/cpukit/include/rtems/score/percpu.h
+++ b/cpukit/include/rtems/score/percpu.h
@@ -293,20 +293,15 @@ typedef struct Per_CPU_Control {
CPU_Per_CPU_control cpu_per_cpu;
#endif
- #if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) || \
- (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
- /**
- * This contains a pointer to the lower range of the interrupt stack for
- * this CPU. This is the address allocated and freed.
- */
- void *interrupt_stack_low;
+ /**
+ * @brief The interrupt stack low address for this processor.
+ */
+ void *interrupt_stack_low;
- /**
- * This contains a pointer to the interrupt stack pointer for this CPU.
- * It will be loaded at the beginning on an ISR.
- */
- void *interrupt_stack_high;
- #endif
+ /**
+ * @brief The interrupt stack high address for this processor.
+ */
+ void *interrupt_stack_high;
/**
* This contains the current interrupt nesting level on this
@@ -800,33 +795,21 @@ RTEMS_INLINE_ROUTINE struct _Thread_Control *_Thread_Get_executing( void )
#if defined( ASM ) || defined( _RTEMS_PERCPU_DEFINE_OFFSETS )
-#if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) || \
- (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
- /*
- * If this CPU target lets RTEMS allocates the interrupt stack, then
- * we need to have places in the per CPU table to hold them.
- */
- #define PER_CPU_INTERRUPT_STACK_LOW \
- CPU_PER_CPU_CONTROL_SIZE
- #define PER_CPU_INTERRUPT_STACK_HIGH \
- PER_CPU_INTERRUPT_STACK_LOW + CPU_SIZEOF_POINTER
- #define PER_CPU_END_STACK \
- PER_CPU_INTERRUPT_STACK_HIGH + CPU_SIZEOF_POINTER
-
- #define INTERRUPT_STACK_LOW \
- (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_LOW)
- #define INTERRUPT_STACK_HIGH \
- (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_HIGH)
-#else
- #define PER_CPU_END_STACK \
- CPU_PER_CPU_CONTROL_SIZE
-#endif
+#define PER_CPU_INTERRUPT_STACK_LOW \
+ CPU_PER_CPU_CONTROL_SIZE
+#define PER_CPU_INTERRUPT_STACK_HIGH \
+ PER_CPU_INTERRUPT_STACK_LOW + CPU_SIZEOF_POINTER
+
+#define INTERRUPT_STACK_LOW \
+ (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_LOW)
+#define INTERRUPT_STACK_HIGH \
+ (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_HIGH)
/*
* These are the offsets of the required elements in the per CPU table.
*/
#define PER_CPU_ISR_NEST_LEVEL \
- PER_CPU_END_STACK
+ PER_CPU_INTERRUPT_STACK_HIGH + CPU_SIZEOF_POINTER
#define PER_CPU_ISR_DISPATCH_DISABLE \
PER_CPU_ISR_NEST_LEVEL + 4
#define PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL \
diff --git a/cpukit/libmisc/stackchk/check.c b/cpukit/libmisc/stackchk/check.c
index abbd0e0845..bc4a7fc478 100644
--- a/cpukit/libmisc/stackchk/check.c
+++ b/cpukit/libmisc/stackchk/check.c
@@ -181,7 +181,6 @@ bool rtems_stack_checker_create_extension(
void rtems_stack_checker_begin_extension( Thread_Control *executing )
{
-#if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE)
Per_CPU_Control *cpu_self;
uint32_t cpu_self_index;
Stack_Control *stack;
@@ -214,7 +213,6 @@ void rtems_stack_checker_begin_extension( Thread_Control *executing )
#if defined(RTEMS_SMP)
_Thread_Dispatch_enable( cpu_self );
#endif
-#endif
}
/*
diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpu.h b/cpukit/score/cpu/arm/include/rtems/score/cpu.h
index 3f06c036f0..4260e98221 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/cpu.h
@@ -105,12 +105,6 @@
*/
#define CPU_SIMPLE_VECTORED_INTERRUPTS FALSE
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK FALSE
-
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
-
-#define CPU_ALLOCATE_INTERRUPT_STACK FALSE
-
#define CPU_ISR_PASSES_FRAME_POINTER FALSE
#define CPU_HARDWARE_FP FALSE
diff --git a/cpukit/score/cpu/bfin/cpu.c b/cpukit/score/cpu/bfin/cpu.c
index 98c83c9586..f5fb0c4cdd 100644
--- a/cpukit/score/cpu/bfin/cpu.c
+++ b/cpukit/score/cpu/bfin/cpu.c
@@ -198,17 +198,3 @@ void _CPU_Context_Initialize(
the_context->register_rets = (uint32_t) entry_point;
the_context->imask = new_level ? 0 : 0xffff;
}
-
-
-
-/*
- * _CPU_Install_interrupt_stack
- *
- * NO_CPU Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-
-void _CPU_Install_interrupt_stack( void )
-{
-}
diff --git a/cpukit/score/cpu/bfin/include/rtems/score/cpu.h b/cpukit/score/cpu/bfin/include/rtems/score/cpu.h
index d3e4e4b057..c19a077bd3 100644
--- a/cpukit/score/cpu/bfin/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/bfin/include/rtems/score/cpu.h
@@ -30,35 +30,6 @@ extern "C" {
/* conditional compilation parameters */
-/**
- * Does RTEMS manage a dedicated interrupt stack in software?
- *
- * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization.
- * If FALSE, nothing is done.
- *
- * If the CPU supports a dedicated interrupt stack in hardware,
- * then it is generally the responsibility of the BSP to allocate it
- * and set it up.
- *
- * If the CPU does not support a dedicated interrupt stack, then
- * the porter has two options: (1) execute interrupts on the
- * stack of the interrupted task, and (2) have RTEMS manage a dedicated
- * interrupt stack.
- *
- * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE
-
/*
* Does the CPU follow the simple vectored interrupt model?
*
@@ -73,40 +44,6 @@ extern "C" {
#define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE
/**
- * Does this CPU have hardware support for a dedicated interrupt stack?
- *
- * If TRUE, then it must be installed during initialization.
- * If FALSE, then no installation is performed.
- *
- * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
-
-/**
- * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager?
- *
- * If TRUE, then the memory is allocated during initialization.
- * If FALSE, then the memory is allocated during initialization.
- *
- * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_ALLOCATE_INTERRUPT_STACK TRUE
-
-/**
* Does the RTEMS invoke the user's ISR with the vector number and
* a pointer to the saved interrupt frame (1) or just the vector
* number (0)?
@@ -402,21 +339,6 @@ typedef struct {
/**
* @defgroup CPUInterrupt Processor Dependent Interrupt Management
- *
- * On some CPUs, RTEMS supports a software managed interrupt stack.
- * This stack is allocated by the Interrupt Manager and the switch
- * is performed in @ref _ISR_Handler. These variables contain pointers
- * to the lowest and highest addresses in the chunk of memory allocated
- * for the interrupt stack. Since it is unknown whether the stack
- * grows up or down (in general), this give the CPU dependent
- * code the option of picking the version it wants to use.
- *
- * @note These two variables are required if the macro
- * @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
*/
/**@{**/
@@ -816,19 +738,6 @@ void _CPU_ISR_install_vector(
);
/**
- * @ingroup CPUInterrupt
- * This routine installs the hardware interrupt stack pointer.
- *
- * @note It need only be provided if @ref CPU_HAS_HARDWARE_INTERRUPT_STACK
- * is TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-void _CPU_Install_interrupt_stack( void );
-
-/**
* This routine is the CPU dependent IDLE thread body.
*
* @note It need only be provided if @ref CPU_PROVIDES_IDLE_THREAD_BODY
diff --git a/cpukit/score/cpu/epiphany/cpu.c b/cpukit/score/cpu/epiphany/cpu.c
index 0428a86367..489576cfc7 100644
--- a/cpukit/score/cpu/epiphany/cpu.c
+++ b/cpukit/score/cpu/epiphany/cpu.c
@@ -83,11 +83,6 @@ void _CPU_ISR_install_vector(
/* Do nothing */
}
-void _CPU_Install_interrupt_stack( void )
-{
- /* Do nothing */
-}
-
CPU_Counter_ticks _CPU_Counter_read( void )
{
static CPU_Counter_ticks counter;
diff --git a/cpukit/score/cpu/epiphany/include/rtems/score/cpu.h b/cpukit/score/cpu/epiphany/include/rtems/score/cpu.h
index 65f28ac435..9167c09eab 100644
--- a/cpukit/score/cpu/epiphany/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/epiphany/include/rtems/score/cpu.h
@@ -50,67 +50,6 @@ extern "C" {
/* conditional compilation parameters */
/*
- * Does RTEMS manage a dedicated interrupt stack in software?
- *
- * If TRUE, then a stack is allocated in _ISR_Handler_initialization.
- * If FALSE, nothing is done.
- *
- * If the CPU supports a dedicated interrupt stack in hardware,
- * then it is generally the responsibility of the BSP to allocate it
- * and set it up.
- *
- * If the CPU does not support a dedicated interrupt stack, then
- * the porter has two options: (1) execute interrupts on the
- * stack of the interrupted task, and (2) have RTEMS manage a dedicated
- * interrupt stack.
- *
- * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * Currently, for epiphany port, _ISR_Handler is responsible for switching to
- * RTEMS dedicated interrupt task.
- *
- */
-
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE
-
-/*
- * Does this CPU have hardware support for a dedicated interrupt stack?
- *
- * If TRUE, then it must be installed during initialization.
- * If FALSE, then no installation is performed.
- *
- * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- */
-
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
-
-/*
- * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager?
- *
- * If TRUE, then the memory is allocated during initialization.
- * If FALSE, then the memory is allocated during initialization.
- *
- * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE
- * or CPU_INSTALL_HARDWARE_INTERRUPT_STACK is TRUE.
- *
- */
-
-#define CPU_ALLOCATE_INTERRUPT_STACK TRUE
-
-/*
* Does the RTEMS invoke the user's ISR with the vector number and
* a pointer to the saved interrupt frame (1) or just the vector
* number (0)?
@@ -728,18 +667,6 @@ void _CPU_ISR_install_vector(
);
/*
- * _CPU_Install_interrupt_stack
- *
- * This routine installs the hardware interrupt stack pointer.
- *
- * NOTE: It need only be provided if CPU_HAS_HARDWARE_INTERRUPT_STACK
- * is TRUE.
- *
- */
-
-void _CPU_Install_interrupt_stack( void );
-
-/*
* _CPU_Thread_Idle_body
*
* This routine is the CPU dependent IDLE thread body.
diff --git a/cpukit/score/cpu/i386/include/rtems/score/cpu.h b/cpukit/score/cpu/i386/include/rtems/score/cpu.h
index c22b42e54b..3f780dbcab 100644
--- a/cpukit/score/cpu/i386/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/i386/include/rtems/score/cpu.h
@@ -50,14 +50,6 @@ extern "C" {
#define CPU_SIMPLE_VECTORED_INTERRUPTS FALSE
/*
- * i386 has an RTEMS allocated and managed interrupt stack.
- */
-
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
-#define CPU_ALLOCATE_INTERRUPT_STACK TRUE
-
-/*
* Does the RTEMS invoke the user's ISR with the vector number and
* a pointer to the saved interrupt frame (1) or just the vector
* number (0)?
diff --git a/cpukit/score/cpu/lm32/cpu.c b/cpukit/score/cpu/lm32/cpu.c
index a9a90c245f..577f5cbb45 100644
--- a/cpukit/score/cpu/lm32/cpu.c
+++ b/cpukit/score/cpu/lm32/cpu.c
@@ -101,18 +101,6 @@ void _CPU_ISR_install_vector(
}
/*
- * _CPU_Install_interrupt_stack
- *
- * LM32 Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-
-void _CPU_Install_interrupt_stack( void )
-{
-}
-
-/*
* _CPU_Thread_Idle_body
*
* NOTES:
diff --git a/cpukit/score/cpu/lm32/include/rtems/score/cpu.h b/cpukit/score/cpu/lm32/include/rtems/score/cpu.h
index 77f3389f39..d5fd9cea85 100644
--- a/cpukit/score/cpu/lm32/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/lm32/include/rtems/score/cpu.h
@@ -29,35 +29,6 @@ extern "C" {
/* conditional compilation parameters */
/**
- * Does RTEMS manage a dedicated interrupt stack in software?
- *
- * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization.
- * If FALSE, nothing is done.
- *
- * If the CPU supports a dedicated interrupt stack in hardware,
- * then it is generally the responsibility of the BSP to allocate it
- * and set it up.
- *
- * If the CPU does not support a dedicated interrupt stack, then
- * the porter has two options: (1) execute interrupts on the
- * stack of the interrupted task, and (2) have RTEMS manage a dedicated
- * interrupt stack.
- *
- * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE
-
-/**
* Does the CPU follow the simple vectored interrupt model?
*
* If TRUE, then RTEMS allocates the vector table it internally manages.
@@ -71,40 +42,6 @@ extern "C" {
#define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE
/**
- * Does this CPU have hardware support for a dedicated interrupt stack?
- *
- * If TRUE, then it must be installed during initialization.
- * If FALSE, then no installation is performed.
- *
- * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
-
-/**
- * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager?
- *
- * If TRUE, then the memory is allocated during initialization.
- * If FALSE, then the memory is allocated during initialization.
- *
- * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_ALLOCATE_INTERRUPT_STACK TRUE
-
-/**
* Does the RTEMS invoke the user's ISR with the vector number and
* a pointer to the saved interrupt frame (1) or just the vector
* number (0)?
@@ -426,21 +363,6 @@ extern Context_Control_fp _CPU_Null_fp_context;
/**
* @defgroup CPUInterrupt Processor Dependent Interrupt Management
- *
- * On some CPUs, RTEMS supports a software managed interrupt stack.
- * This stack is allocated by the Interrupt Manager and the switch
- * is performed in @ref _ISR_Handler. These variables contain pointers
- * to the lowest and highest addresses in the chunk of memory allocated
- * for the interrupt stack. Since it is unknown whether the stack
- * grows up or down (in general), this give the CPU dependent
- * code the option of picking the version it wants to use.
- *
- * NOTE: These two variables are required if the macro
- * @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
*/
/**@{**/
@@ -847,18 +769,6 @@ void _CPU_ISR_install_vector(
proc_ptr *old_handler
);
-/**
- * This routine installs the hardware interrupt stack pointer.
- *
- * NOTE: It need only be provided if @ref CPU_HAS_HARDWARE_INTERRUPT_STACK
- * is TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-void _CPU_Install_interrupt_stack( void );
-
/** @} */
/**
diff --git a/cpukit/score/cpu/lm32/irq.c b/cpukit/score/cpu/lm32/irq.c
index be84d747b6..5d227cb2e4 100644
--- a/cpukit/score/cpu/lm32/irq.c
+++ b/cpukit/score/cpu/lm32/irq.c
@@ -21,9 +21,7 @@
#include <rtems/score/percpu.h>
#include <rtems/score/threaddispatch.h>
-#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
- unsigned long *_old_stack_ptr;
-#endif
+unsigned long *_old_stack_ptr;
void *_exception_stack_frame;
@@ -44,13 +42,11 @@ void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr)
_Thread_Dispatch_disable();
-#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
if ( _ISR_Nest_level == 0 ) {
/* Install irq stack */
_old_stack_ptr = stack_ptr;
stack_ptr = _CPU_Interrupt_stack_high - 4;
}
-#endif
_ISR_Nest_level++;
@@ -64,10 +60,8 @@ void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr)
_ISR_Nest_level--;
-#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
if( _ISR_Nest_level == 0)
stack_ptr = _old_stack_ptr;
-#endif
_Thread_Dispatch_unnest( _Per_CPU_Get() );
diff --git a/cpukit/score/cpu/m32c/cpu.c b/cpukit/score/cpu/m32c/cpu.c
index 4592e8ced3..6b4f88634d 100644
--- a/cpukit/score/cpu/m32c/cpu.c
+++ b/cpukit/score/cpu/m32c/cpu.c
@@ -113,18 +113,6 @@ void _CPU_ISR_install_vector(
}
/*
- * _CPU_Install_interrupt_stack
- *
- * NO_CPU Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-
-void _CPU_Install_interrupt_stack( void )
-{
-}
-
-/*
* _CPU_Thread_Idle_body
*
* NOTES:
diff --git a/cpukit/score/cpu/m32c/cpu_asm.c b/cpukit/score/cpu/m32c/cpu_asm.c
index f992c57b3d..16a80b2963 100644
--- a/cpukit/score/cpu/m32c/cpu_asm.c
+++ b/cpukit/score/cpu/m32c/cpu_asm.c
@@ -73,10 +73,8 @@ void _ISR_Handler(void)
* save some or all context on stack
* may need to save some special interrupt information for exit
*
- * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
- * if ( _ISR_Nest_level == 0 )
- * switch to software interrupt stack
- * #endif
+ * if ( _ISR_Nest_level == 0 )
+ * switch to software interrupt stack
*
* _ISR_Nest_level++;
*
@@ -100,10 +98,8 @@ void _ISR_Handler(void)
* return from interrupt (maybe to _ISR_Dispatch)
*
* LABEL "exit interrupt (simple case):
- * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
- * if outermost interrupt
- * restore stack
- * #endif
+ * if outermost interrupt
+ * restore stack
* prepare to get out of interrupt
* return from interrupt
*/
diff --git a/cpukit/score/cpu/m32c/include/rtems/score/cpu.h b/cpukit/score/cpu/m32c/include/rtems/score/cpu.h
index 3f23c21d88..74794fe6fe 100644
--- a/cpukit/score/cpu/m32c/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/m32c/include/rtems/score/cpu.h
@@ -45,35 +45,6 @@ extern "C" {
#define RTEMS_USE_16_BIT_OBJECT
/**
- * Does RTEMS manage a dedicated interrupt stack in software?
- *
- * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization.
- * If FALSE, nothing is done.
- *
- * If the CPU supports a dedicated interrupt stack in hardware,
- * then it is generally the responsibility of the BSP to allocate it
- * and set it up.
- *
- * If the CPU does not support a dedicated interrupt stack, then
- * the porter has two options: (1) execute interrupts on the
- * stack of the interrupted task, and (2) have RTEMS manage a dedicated
- * interrupt stack.
- *
- * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK FALSE
-
-/**
* Does the CPU follow the simple vectored interrupt model?
*
* If TRUE, then RTEMS allocates the vector table it internally manages.
@@ -87,40 +58,6 @@ extern "C" {
#define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE
/**
- * Does this CPU have hardware support for a dedicated interrupt stack?
- *
- * If TRUE, then it must be installed during initialization.
- * If FALSE, then no installation is performed.
- *
- * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK TRUE
-
-/**
- * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager?
- *
- * If TRUE, then the memory is allocated during initialization.
- * If FALSE, then the memory is allocated during initialization.
- *
- * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_ALLOCATE_INTERRUPT_STACK TRUE
-
-/**
* Does the RTEMS invoke the user's ISR with the vector number and
* a pointer to the saved interrupt frame (1) or just the vector
* number (0)?
@@ -409,22 +346,6 @@ typedef struct {
/**
* @defgroup CPUInterrupt Processor Dependent Interrupt Management
- *
- * On some CPUs, RTEMS supports a software managed interrupt stack.
- * This stack is allocated by the Interrupt Manager and the switch
- * is performed in @ref _ISR_Handler. These variables contain pointers
- * to the lowest and highest addresses in the chunk of memory allocated
- * for the interrupt stack. Since it is unknown whether the stack
- * grows up or down (in general), this give the CPU dependent
- * code the option of picking the version it wants to use.
- *
- * NOTE: These two variables are required if the macro
- * @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- *
*/
/**@{**/
@@ -836,20 +757,6 @@ void _CPU_ISR_install_vector(
);
/**
- * @ingroup CPUInterrupt
- *
- * This routine installs the hardware interrupt stack pointer.
- *
- * NOTE: It need only be provided if @ref CPU_HAS_HARDWARE_INTERRUPT_STACK
- * is TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-void _CPU_Install_interrupt_stack( void );
-
-/**
* This routine is the CPU dependent IDLE thread body.
*
* NOTE: It need only be provided if @ref CPU_PROVIDES_IDLE_THREAD_BODY
diff --git a/cpukit/score/cpu/m68k/cpu.c b/cpukit/score/cpu/m68k/cpu.c
index c50a63fda1..77a91535c3 100644
--- a/cpukit/score/cpu/m68k/cpu.c
+++ b/cpukit/score/cpu/m68k/cpu.c
@@ -20,6 +20,7 @@
#include <rtems/score/isr.h>
#include <rtems/score/percpu.h>
#include <rtems/score/tls.h>
+#include <rtems/config.h>
#if ( M68K_HAS_VBR == 0 )
@@ -58,6 +59,15 @@ int (*_FPSP_install_raw_handler)(
uint32_t _CPU_cacr_shadow;
#endif
+static void m68k_install_interrupt_stack( void )
+{
+#if ( M68K_HAS_SEPARATE_STACKS == 1 )
+ uintptr_t isp = (uintptr_t) _Configuration_Interrupt_stack_area_end;
+
+ __asm__ volatile ( "movec %0,%%isp" : "=r" (isp) : "0" (isp) );
+#endif
+}
+
void _CPU_Initialize(void)
{
#if ( M68K_HAS_VBR == 0 )
@@ -74,6 +84,8 @@ void _CPU_Initialize(void)
_CPU_ISR_jump_table[slot].isr_handler = (uint32_t) 0xDEADDEAD;
}
#endif /* M68K_HAS_VBR */
+
+ m68k_install_interrupt_stack();
}
uint32_t _CPU_ISR_Get_level( void )
@@ -151,20 +163,6 @@ void _CPU_ISR_install_vector(
_ISR_Vector_table[ vector ] = new_handler;
}
-
-/*
- * _CPU_Install_interrupt_stack
- */
-
-void _CPU_Install_interrupt_stack( void )
-{
-#if ( M68K_HAS_SEPARATE_STACKS == 1 )
- void *isp = _CPU_Interrupt_stack_high;
-
- __asm__ volatile ( "movec %0,%%isp" : "=r" (isp) : "0" (isp) );
-#endif
-}
-
#if ( M68K_HAS_BFFFO != 1 )
/*
* Returns table for duplication of the BFFFO instruction (16 bits only)
diff --git a/cpukit/score/cpu/m68k/cpu_asm.S b/cpukit/score/cpu/m68k/cpu_asm.S
index a31c1588a4..6ec89d8ee0 100644
--- a/cpukit/score/cpu/m68k/cpu_asm.S
+++ b/cpukit/score/cpu/m68k/cpu_asm.S
@@ -259,7 +259,7 @@ SYM (_ISR_Handler):
andl #0x03fc,d0 | d0 = vector offset in vbr
-#if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 )
+#if ( M68K_HAS_SEPARATE_STACKS == 0 )
| Make a0 point just above interrupt stack
movel INTERRUPT_STACK_HIGH,a0
cmpl INTERRUPT_STACK_LOW,a7 | stack below interrupt stack?
@@ -272,7 +272,7 @@ SYM (_ISR_Handler):
movel a1,a7@- | store task stack pointer
| on interrupt stack
2:
-#endif /* CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 */
+#endif /* M68K_HAS_SEPARATE_STACKS == 0 */
addql #1,ISR_NEST_LEVEL | one nest level deeper
@@ -285,14 +285,14 @@ SYM (_ISR_Handler):
addql #4,a7 | remove vector number
subql #1,ISR_NEST_LEVEL | Reduce interrupt-nesting count
-#if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 )
+#if ( M68K_HAS_SEPARATE_STACKS == 0 )
movel INTERRUPT_STACK_HIGH,a0
subql #4,a0
cmpl a0,a7 | At top of interrupt stack?
bne.b 1f | No, do not restore task stack pointer
movel (a7),a7 | Restore task stack pointer
1:
-#endif /* CPU_HAS_SOFTWARE_INTERRUPT_STACK == 1 */
+#endif /* M68K_HAS_SEPARATE_STACKS == 0 */
subql #1,THREAD_DISPATCH_DISABLE_LEVEL
| unnest multitasking
bne.b exit | If dispatch disabled, exit
diff --git a/cpukit/score/cpu/m68k/include/rtems/score/cpu.h b/cpukit/score/cpu/m68k/include/rtems/score/cpu.h
index 1b1b460901..9915f36434 100644
--- a/cpukit/score/cpu/m68k/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/m68k/include/rtems/score/cpu.h
@@ -42,20 +42,6 @@ extern "C" {
#define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE
/*
- * Use the m68k's hardware interrupt stack support and have the
- * interrupt manager allocate the memory for it.
- */
-
-#if ( M68K_HAS_SEPARATE_STACKS == 1)
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK 0
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK 1
-#else
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK 1
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK 0
-#endif
-#define CPU_ALLOCATE_INTERRUPT_STACK 1
-
-/*
* Does the RTEMS invoke the user's ISR with the vector number and
* a pointer to the saved interrupt frame (1) or just the vector
* number (0)?
@@ -615,14 +601,6 @@ void _CPU_ISR_install_vector(
);
/*
- * _CPU_Install_interrupt_stack
- *
- * This routine installs the hardware interrupt stack pointer.
- */
-
-void _CPU_Install_interrupt_stack( void );
-
-/*
* _CPU_Context_switch
*
* This routine switches from the run context to the heir context.
diff --git a/cpukit/score/cpu/mips/cpu.c b/cpukit/score/cpu/mips/cpu.c
index fe89a10ec7..7f48d090f9 100644
--- a/cpukit/score/cpu/mips/cpu.c
+++ b/cpukit/score/cpu/mips/cpu.c
@@ -166,11 +166,6 @@ void _CPU_ISR_Set_level( uint32_t new_level )
mips_set_sr( sr );
}
-void _CPU_Install_interrupt_stack( void )
-{
-/* we don't support this yet */
-}
-
void _CPU_Context_Initialize(
Context_Control *the_context,
uintptr_t *stack_base,
diff --git a/cpukit/score/cpu/mips/cpu_asm.S b/cpukit/score/cpu/mips/cpu_asm.S
index c58aee1e50..8a58831b92 100644
--- a/cpukit/score/cpu/mips/cpu_asm.S
+++ b/cpukit/score/cpu/mips/cpu_asm.S
@@ -872,10 +872,8 @@ _ISR_Handler_1:
* save some or all context on stack
* may need to save some special interrupt information for exit
*
- * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
- * if ( _ISR_Nest_level == 0 )
- * switch to software interrupt stack
- * #endif
+ * if ( _ISR_Nest_level == 0 )
+ * switch to software interrupt stack
*/
@@ -939,9 +937,7 @@ _ISR_Handler_1:
/*
- * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
- * restore stack
- * #endif
+ * restore stack
*
* if !_Thread_Dispatch_necessary
* goto the label "exit interrupt (simple case)"
diff --git a/cpukit/score/cpu/mips/include/rtems/score/cpu.h b/cpukit/score/cpu/mips/include/rtems/score/cpu.h
index c20e5f4f01..df9f2b71b0 100644
--- a/cpukit/score/cpu/mips/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/mips/include/rtems/score/cpu.h
@@ -62,32 +62,6 @@ extern "C" {
/* conditional compilation parameters */
/*
- * Does RTEMS manage a dedicated interrupt stack in software?
- *
- * If TRUE, then a stack is allocated in _Interrupt_Manager_initialization.
- * If FALSE, nothing is done.
- *
- * If the CPU supports a dedicated interrupt stack in hardware,
- * then it is generally the responsibility of the BSP to allocate it
- * and set it up.
- *
- * If the CPU does not support a dedicated interrupt stack, then
- * the porter has two options: (1) execute interrupts on the
- * stack of the interrupted task, and (2) have RTEMS manage a dedicated
- * interrupt stack.
- *
- * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- */
-
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK FALSE
-
-/*
* Does the CPU follow the simple vectored interrupt model?
*
* If TRUE, then RTEMS allocates the vector table it internally manages.
@@ -102,34 +76,6 @@ extern "C" {
#define CPU_SIMPLE_VECTORED_INTERRUPTS FALSE
/*
- * Does this CPU have hardware support for a dedicated interrupt stack?
- *
- * If TRUE, then it must be installed during initialization.
- * If FALSE, then no installation is performed.
- *
- * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- */
-
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
-
-/*
- * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager?
- *
- * If TRUE, then the memory is allocated during initialization.
- * If FALSE, then the memory is allocated during initialization.
- *
- * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE.
- */
-
-#define CPU_ALLOCATE_INTERRUPT_STACK FALSE
-
-/*
* Does the RTEMS invoke the user's ISR with the vector number and
* a pointer to the saved interrupt frame (1) or just the vector
* number (0)?
@@ -871,17 +817,6 @@ void _CPU_ISR_install_vector(
);
/*
- * _CPU_Install_interrupt_stack
- *
- * This routine installs the hardware interrupt stack pointer.
- *
- * NOTE: It need only be provided if CPU_HAS_HARDWARE_INTERRUPT_STACK
- * is TRUE.
- */
-
-void _CPU_Install_interrupt_stack( void );
-
-/*
* _CPU_Internal_threads_Idle_thread_body
*
* This routine is the CPU dependent IDLE thread body.
diff --git a/cpukit/score/cpu/moxie/cpu.c b/cpukit/score/cpu/moxie/cpu.c
index 2a0dc1e9fd..7fd21cd04c 100644
--- a/cpukit/score/cpu/moxie/cpu.c
+++ b/cpukit/score/cpu/moxie/cpu.c
@@ -105,13 +105,6 @@ void _CPU_ISR_install_vector(
}
/*
- * _CPU_Install_interrupt_stack
- */
-void _CPU_Install_interrupt_stack( void )
-{
-}
-
-/*
* _CPU_Thread_Idle_body
*
* NOTES:
diff --git a/cpukit/score/cpu/moxie/include/rtems/score/cpu.h b/cpukit/score/cpu/moxie/include/rtems/score/cpu.h
index 9b6dbecc9c..4b6891f495 100644
--- a/cpukit/score/cpu/moxie/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/moxie/include/rtems/score/cpu.h
@@ -38,35 +38,6 @@ extern "C" {
#define RTEMS_USE_32_BIT_OBJECT
/*
- * Does RTEMS manage a dedicated interrupt stack in software?
- *
- * If TRUE, then a stack is allocated in _ISR_Handler_initialization.
- * If FALSE, nothing is done.
- *
- * If the CPU supports a dedicated interrupt stack in hardware,
- * then it is generally the responsibility of the BSP to allocate it
- * and set it up.
- *
- * If the CPU does not support a dedicated interrupt stack, then
- * the porter has two options: (1) execute interrupts on the
- * stack of the interrupted task, and (2) have RTEMS manage a dedicated
- * interrupt stack.
- *
- * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * MOXIE Specific Information:
- *
- * XXX
- */
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE
-
-/*
* Does the CPU follow the simple vectored interrupt model?
*
* If TRUE, then RTEMS allocates the vector table it internally manages.
@@ -80,40 +51,6 @@ extern "C" {
#define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE
/*
- * Does this CPU have hardware support for a dedicated interrupt stack?
- *
- * If TRUE, then it must be installed during initialization.
- * If FALSE, then no installation is performed.
- *
- * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * MOXIE Specific Information:
- *
- * XXX
- */
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
-
-/*
- * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager?
- *
- * If TRUE, then the memory is allocated during initialization.
- * If FALSE, then the memory is allocated during initialization.
- *
- * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE.
- *
- * MOXIE Specific Information:
- *
- * XXX
- */
-#define CPU_ALLOCATE_INTERRUPT_STACK TRUE
-
-/*
* Does the CPU have hardware floating point?
*
* If TRUE, then the RTEMS_FLOATING_POINT task attribute is supported.
@@ -679,20 +616,6 @@ void _CPU_ISR_install_vector(
);
/*
- * _CPU_Install_interrupt_stack
- *
- * This routine installs the hardware interrupt stack pointer.
- *
- * NOTE: It need only be provided if CPU_HAS_HARDWARE_INTERRUPT_STACK
- * is TRUE.
- *
- * MOXIE Specific Information:
- *
- * XXX
- */
-void _CPU_Install_interrupt_stack( void );
-
-/*
* _CPU_Internal_threads_Idle_thread_body
*
* This routine is the CPU dependent IDLE thread body.
diff --git a/cpukit/score/cpu/nios2/include/rtems/score/cpu.h b/cpukit/score/cpu/nios2/include/rtems/score/cpu.h
index 3cc56e591b..ae1c027def 100644
--- a/cpukit/score/cpu/nios2/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/nios2/include/rtems/score/cpu.h
@@ -27,8 +27,6 @@ extern "C" {
#include <rtems/score/basedefs.h>
#include <rtems/score/nios2.h>
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE
-
#define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE
#define CPU_INTERRUPT_NUMBER_OF_VECTORS 32
@@ -37,10 +35,6 @@ extern "C" {
#define CPU_PROVIDES_ISR_IS_IN_PROGRESS TRUE
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
-
-#define CPU_ALLOCATE_INTERRUPT_STACK TRUE
-
#define CPU_ISR_PASSES_FRAME_POINTER FALSE
#define CPU_HARDWARE_FP FALSE
diff --git a/cpukit/score/cpu/nios2/nios2-iic-irq.c b/cpukit/score/cpu/nios2/nios2-iic-irq.c
index 99f1618f02..cec24fd5dc 100644
--- a/cpukit/score/cpu/nios2/nios2-iic-irq.c
+++ b/cpukit/score/cpu/nios2/nios2-iic-irq.c
@@ -32,9 +32,7 @@
* Upon entry, interrupts are disabled
*/
-#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
- unsigned long *_old_stack_ptr;
-#endif
+unsigned long *_old_stack_ptr;
/*
* Prototypes
@@ -98,13 +96,11 @@ void __ISR_Handler(void)
/* Interrupts are disabled upon entry to this Handler */
-#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
if ( _ISR_Nest_level == 0 ) {
/* Install irq stack */
_old_stack_ptr = stack_ptr;
stack_ptr = _CPU_Interrupt_stack_high - 4;
}
-#endif
_ISR_Nest_level++;
@@ -120,9 +116,7 @@ void __ISR_Handler(void)
_ISR_Nest_level--;
if( _ISR_Nest_level == 0) {
-#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
stack_ptr = _old_stack_ptr;
-#endif
if( _Thread_Dispatch_is_enabled() )
{
diff --git a/cpukit/score/cpu/no_cpu/cpu.c b/cpukit/score/cpu/no_cpu/cpu.c
index 88bd413f21..fe1e303320 100644
--- a/cpukit/score/cpu/no_cpu/cpu.c
+++ b/cpukit/score/cpu/no_cpu/cpu.c
@@ -87,18 +87,6 @@ void _CPU_ISR_install_vector(
}
/*
- * _CPU_Install_interrupt_stack
- *
- * NO_CPU Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-
-void _CPU_Install_interrupt_stack( void )
-{
-}
-
-/*
* _CPU_Thread_Idle_body
*
* NOTES:
diff --git a/cpukit/score/cpu/no_cpu/cpu_asm.c b/cpukit/score/cpu/no_cpu/cpu_asm.c
index 4e56960168..359bee3367 100644
--- a/cpukit/score/cpu/no_cpu/cpu_asm.c
+++ b/cpukit/score/cpu/no_cpu/cpu_asm.c
@@ -151,10 +151,8 @@ void _ISR_Handler(void)
* save some or all context on stack
* may need to save some special interrupt information for exit
*
- * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
- * if ( _ISR_Nest_level == 0 )
- * switch to software interrupt stack
- * #endif
+ * if ( _ISR_Nest_level == 0 )
+ * switch to software interrupt stack
*
* _ISR_Nest_level++;
*
@@ -178,10 +176,8 @@ void _ISR_Handler(void)
* return from interrupt (maybe to _ISR_Dispatch)
*
* LABEL "exit interrupt (simple case):
- * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
- * if outermost interrupt
- * restore stack
- * #endif
+ * if outermost interrupt
+ * restore stack
* prepare to get out of interrupt
* return from interrupt
*/
diff --git a/cpukit/score/cpu/no_cpu/include/rtems/score/cpu.h b/cpukit/score/cpu/no_cpu/include/rtems/score/cpu.h
index c843e2661a..2cbad57843 100644
--- a/cpukit/score/cpu/no_cpu/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/no_cpu/include/rtems/score/cpu.h
@@ -46,35 +46,6 @@ extern "C" {
/* conditional compilation parameters */
/**
- * Does RTEMS manage a dedicated interrupt stack in software?
- *
- * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization.
- * If FALSE, nothing is done.
- *
- * If the CPU supports a dedicated interrupt stack in hardware,
- * then it is generally the responsibility of the BSP to allocate it
- * and set it up.
- *
- * If the CPU does not support a dedicated interrupt stack, then
- * the porter has two options: (1) execute interrupts on the
- * stack of the interrupted task, and (2) have RTEMS manage a dedicated
- * interrupt stack.
- *
- * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK FALSE
-
-/**
* Does the CPU follow the simple vectored interrupt model?
*
* If TRUE, then RTEMS allocates the vector table it internally manages.
@@ -88,40 +59,6 @@ extern "C" {
#define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE
/**
- * Does this CPU have hardware support for a dedicated interrupt stack?
- *
- * If TRUE, then it must be installed during initialization.
- * If FALSE, then no installation is performed.
- *
- * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK TRUE
-
-/**
- * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager?
- *
- * If TRUE, then the memory is allocated during initialization.
- * If FALSE, then the memory is allocated during initialization.
- *
- * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_ALLOCATE_INTERRUPT_STACK TRUE
-
-/**
* Does the RTEMS invoke the user's ISR with the vector number and
* a pointer to the saved interrupt frame (1) or just the vector
* number (0)?
@@ -521,16 +458,13 @@ extern Context_Control_fp _CPU_Null_fp_context;
/**
* @defgroup CPUInterrupt Processor Dependent Interrupt Management
*
- * On some CPUs, RTEMS supports a software managed interrupt stack.
- * This stack is allocated by the Interrupt Manager and the switch
- * is performed in @ref _ISR_Handler. These variables contain pointers
- * to the lowest and highest addresses in the chunk of memory allocated
- * for the interrupt stack. Since it is unknown whether the stack
- * grows up or down (in general), this give the CPU dependent
- * code the option of picking the version it wants to use.
- *
- * NOTE: These two variables are required if the macro
- * @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE.
+ * RTEMS supports a software managed interrupt stack. The interrupt stacks
+ * are statically allocated by <rtems/confdefs.h> and the switch is performed
+ * by hardware or the interrupt processing code. These variables contain
+ * pointers to the lowest and highest addresses in the chunk of memory
+ * allocated for the interrupt stack. Since it is unknown whether the stack
+ * grows up or down (in general), this give the CPU dependent code the option
+ * of picking the version it wants to use.
*
* Port Specific Information:
*
@@ -1126,19 +1060,6 @@ void _CPU_ISR_install_vector(
);
/**
- * @ingroup CPUInterrupt
- * This routine installs the hardware interrupt stack pointer.
- *
- * NOTE: It need only be provided if @ref CPU_HAS_HARDWARE_INTERRUPT_STACK
- * is TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-void _CPU_Install_interrupt_stack( void );
-
-/**
* This routine is the CPU dependent IDLE thread body.
*
* NOTE: It need only be provided if @ref CPU_PROVIDES_IDLE_THREAD_BODY
diff --git a/cpukit/score/cpu/or1k/cpu.c b/cpukit/score/cpu/or1k/cpu.c
index fe933f0cbb..b4cbe00f9b 100644
--- a/cpukit/score/cpu/or1k/cpu.c
+++ b/cpukit/score/cpu/or1k/cpu.c
@@ -105,10 +105,6 @@ void _CPU_ISR_install_vector(
_ISR_Local_enable( level );
}
-void _CPU_Install_interrupt_stack( void )
-{
-}
-
void *_CPU_Thread_Idle_body( uintptr_t ignored )
{
do {
diff --git a/cpukit/score/cpu/or1k/include/rtems/score/cpu.h b/cpukit/score/cpu/or1k/include/rtems/score/cpu.h
index 4f8df4a7f0..bd1b6bc1a0 100644
--- a/cpukit/score/cpu/or1k/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/or1k/include/rtems/score/cpu.h
@@ -40,67 +40,6 @@ extern "C" {
/* conditional compilation parameters */
/*
- * Does RTEMS manage a dedicated interrupt stack in software?
- *
- * If TRUE, then a stack is allocated in _ISR_Handler_initialization.
- * If FALSE, nothing is done.
- *
- * If the CPU supports a dedicated interrupt stack in hardware,
- * then it is generally the responsibility of the BSP to allocate it
- * and set it up.
- *
- * If the CPU does not support a dedicated interrupt stack, then
- * the porter has two options: (1) execute interrupts on the
- * stack of the interrupted task, and (2) have RTEMS manage a dedicated
- * interrupt stack.
- *
- * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * Currently, for or1k port, _ISR_Handler is responsible for switching to
- * RTEMS dedicated interrupt task.
- *
- */
-
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE
-
-/*
- * Does this CPU have hardware support for a dedicated interrupt stack?
- *
- * If TRUE, then it must be installed during initialization.
- * If FALSE, then no installation is performed.
- *
- * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- */
-
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
-
-/*
- * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager?
- *
- * If TRUE, then the memory is allocated during initialization.
- * If FALSE, then the memory is allocated during initialization.
- *
- * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE
- * or CPU_INSTALL_HARDWARE_INTERRUPT_STACK is TRUE.
- *
- */
-
-#define CPU_ALLOCATE_INTERRUPT_STACK TRUE
-
-/*
* Does the RTEMS invoke the user's ISR with the vector number and
* a pointer to the saved interrupt frame (1) or just the vector
* number (0)?
@@ -736,18 +675,6 @@ void _CPU_ISR_install_vector(
);
/*
- * _CPU_Install_interrupt_stack
- *
- * This routine installs the hardware interrupt stack pointer.
- *
- * NOTE: It need only be provided if CPU_HAS_HARDWARE_INTERRUPT_STACK
- * is TRUE.
- *
- */
-
-void _CPU_Install_interrupt_stack( void );
-
-/*
* _CPU_Thread_Idle_body
*
* This routine is the CPU dependent IDLE thread body.
diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h
index 65f31ddb6c..8a17af287c 100644
--- a/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h
@@ -473,60 +473,6 @@ typedef struct {
#define CPU_SIMPLE_VECTORED_INTERRUPTS FALSE
/*
- * Does RTEMS manage a dedicated interrupt stack in software?
- *
- * If TRUE, then a stack is allocated in _ISR_Handler_initialization.
- * If FALSE, nothing is done.
- *
- * If the CPU supports a dedicated interrupt stack in hardware,
- * then it is generally the responsibility of the BSP to allocate it
- * and set it up.
- *
- * If the CPU does not support a dedicated interrupt stack, then
- * the porter has two options: (1) execute interrupts on the
- * stack of the interrupted task, and (2) have RTEMS manage a dedicated
- * interrupt stack.
- *
- * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- */
-
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE
-
-/*
- * Does this CPU have hardware support for a dedicated interrupt stack?
- *
- * If TRUE, then it must be installed during initialization.
- * If FALSE, then no installation is performed.
- *
- * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- */
-
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
-
-/*
- * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager?
- *
- * If TRUE, then the memory is allocated during initialization.
- * If FALSE, then the memory is allocated during initialization.
- *
- * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE.
- */
-
-#define CPU_ALLOCATE_INTERRUPT_STACK TRUE
-
-/*
* Does the RTEMS invoke the user's ISR with the vector number and
* a pointer to the saved interrupt frame (1) or just the vector
* number (0)?
diff --git a/cpukit/score/cpu/riscv/cpu.c b/cpukit/score/cpu/riscv/cpu.c
index 8d2926e715..fbdb4c5238 100644
--- a/cpukit/score/cpu/riscv/cpu.c
+++ b/cpukit/score/cpu/riscv/cpu.c
@@ -110,11 +110,6 @@ void _CPU_ISR_install_vector(
}
-void _CPU_Install_interrupt_stack( void )
-{
- /* Do nothing */
-}
-
void *_CPU_Thread_Idle_body( uintptr_t ignored )
{
do {
diff --git a/cpukit/score/cpu/riscv/include/rtems/score/cpu.h b/cpukit/score/cpu/riscv/include/rtems/score/cpu.h
index 2b3b60937e..1e72dd3709 100644
--- a/cpukit/score/cpu/riscv/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/riscv/include/rtems/score/cpu.h
@@ -50,9 +50,6 @@ extern "C" {
#define CPU_INLINE_ENABLE_DISPATCH FALSE
#define CPU_UNROLL_ENQUEUE_PRIORITY TRUE
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
-#define CPU_ALLOCATE_INTERRUPT_STACK TRUE
#define CPU_ISR_PASSES_FRAME_POINTER 1
#define CPU_HARDWARE_FP FALSE
#define CPU_SOFTWARE_FP FALSE
@@ -351,18 +348,6 @@ void _CPU_ISR_install_vector(
);
/*
- * _CPU_Install_interrupt_stack
- *
- * This routine installs the hardware interrupt stack pointer.
- *
- * NOTE: It need only be provided if CPU_HAS_HARDWARE_INTERRUPT_STACK
- * is TRUE.
- *
- */
-
-void _CPU_Install_interrupt_stack( void );
-
-/*
* _CPU_Thread_Idle_body
*
* This routine is the CPU dependent IDLE thread body.
diff --git a/cpukit/score/cpu/sh/include/rtems/score/cpu.h b/cpukit/score/cpu/sh/include/rtems/score/cpu.h
index d3c9bc6d39..3952abeae5 100644
--- a/cpukit/score/cpu/sh/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sh/include/rtems/score/cpu.h
@@ -50,38 +50,6 @@ extern "C" {
#define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE
/*
- * Does RTEMS manage a dedicated interrupt stack in software?
- *
- * If TRUE, then a stack is allocated in _ISR_Handler_initialization.
- * If FALSE, nothing is done.
- *
- * If the CPU supports a dedicated interrupt stack in hardware,
- * then it is generally the responsibility of the BSP to allocate it
- * and set it up.
- *
- * If the CPU does not support a dedicated interrupt stack, then
- * the porter has two options: (1) execute interrupts on the
- * stack of the interrupted task, and (2) have RTEMS manage a dedicated
- * interrupt stack.
- *
- * If this is TRUE, CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- */
-
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
-
-/*
- * We define the interrupt stack in the linker script
- */
-#define CPU_ALLOCATE_INTERRUPT_STACK FALSE
-
-/*
* Does the RTEMS invoke the user's ISR with the vector number and
* a pointer to the saved interrupt frame (1) or just the vector
* number (0)?
@@ -641,17 +609,6 @@ void _CPU_ISR_install_vector(
);
/*
- * _CPU_Install_interrupt_stack
- *
- * This routine installs the hardware interrupt stack pointer.
- *
- * NOTE: It needs only be provided if CPU_HAS_HARDWARE_INTERRUPT_STACK
- * is TRUE.
- */
-
-void _CPU_Install_interrupt_stack( void );
-
-/*
* _CPU_Thread_Idle_body
*
* This routine is the CPU dependent IDLE thread body.
diff --git a/cpukit/score/cpu/sparc/include/rtems/score/cpu.h b/cpukit/score/cpu/sparc/include/rtems/score/cpu.h
index 16618e7b49..9b32f76338 100644
--- a/cpukit/score/cpu/sparc/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sparc/include/rtems/score/cpu.h
@@ -69,17 +69,6 @@ extern "C" {
#endif
/**
- * Does the executive manage a dedicated interrupt stack in software?
- *
- * If TRUE, then a stack is allocated in _ISR_Handler_initialization.
- * If FALSE, nothing is done.
- *
- * The SPARC does not have a dedicated HW interrupt stack and one has
- * been implemented in SW.
- */
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE
-
-/**
* Does the CPU follow the simple vectored interrupt model?
*
* - If TRUE, then RTEMS allocates the vector table it internally manages.
@@ -92,29 +81,6 @@ extern "C" {
#define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE
/**
- * Does this CPU have hardware support for a dedicated interrupt stack?
- *
- * - If TRUE, then it must be installed during initialization.
- * - If FALSE, then no installation is performed.
- *
- * The SPARC does not have a dedicated HW interrupt stack.
- */
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
-
-/**
- * Do we allocate a dedicated interrupt stack in the Interrupt Manager?
- *
- * - If TRUE, then the memory is allocated during initialization.
- * - If FALSE, then the memory is allocated during initialization.
- *
- * The SPARC does not have hardware support for switching to a
- * dedicated interrupt stack. The port includes support for doing this
- * in software.
- *
- */
-#define CPU_ALLOCATE_INTERRUPT_STACK TRUE
-
-/**
* Does the RTEMS invoke the user's ISR with the vector number and
* a pointer to the saved interrupt frame (1) or just the vector
* number (0)?
diff --git a/cpukit/score/cpu/sparc64/include/rtems/score/cpu.h b/cpukit/score/cpu/sparc64/include/rtems/score/cpu.h
index feb7752915..3172802046 100644
--- a/cpukit/score/cpu/sparc64/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sparc64/include/rtems/score/cpu.h
@@ -34,18 +34,6 @@ extern "C" {
/* conditional compilation parameters */
/*
- * Does the executive manage a dedicated interrupt stack in software?
- *
- * If TRUE, then a stack is allocated in _ISR_Handler_initialization.
- * If FALSE, nothing is done.
- *
- * The SPARC does not have a dedicated HW interrupt stack and one has
- * been implemented in SW.
- */
-
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE
-
-/*
* Does the CPU follow the simple vectored interrupt model?
*
* If TRUE, then RTEMS allocates the vector table it internally manages.
@@ -59,26 +47,6 @@ extern "C" {
#define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE
/*
- * Does this CPU have hardware support for a dedicated interrupt stack?
- *
- * If TRUE, then it must be installed during initialization.
- * If FALSE, then no installation is performed.
- *
- * The SPARC does not have a dedicated HW interrupt stack.
- */
-
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
-
-/*
- * Do we allocate a dedicated interrupt stack in the Interrupt Manager?
- *
- * If TRUE, then the memory is allocated during initialization.
- * If FALSE, then the memory is allocated during initialization.
- */
-
-#define CPU_ALLOCATE_INTERRUPT_STACK TRUE
-
-/*
* Does the RTEMS invoke the user's ISR with the vector number and
* a pointer to the saved interrupt frame (1) or just the vector
* number (0)?
diff --git a/cpukit/score/cpu/v850/cpu_asm.S b/cpukit/score/cpu/v850/cpu_asm.S
index 328c71cea2..e9aa738d13 100644
--- a/cpukit/score/cpu/v850/cpu_asm.S
+++ b/cpukit/score/cpu/v850/cpu_asm.S
@@ -138,76 +138,3 @@ restore:
__CPU_Context_restore:
mov r6, r7 /* move to second parameter register */
br restore
-
-#if 0
-/**
- * This routine provides the RTEMS interrupt management.
- *
- * v850 Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-void _ISR_Handler(void); /* C warning avoidance */
-void _ISR_Handler(void)
-{
- /*
- * This discussion ignores a lot of the ugly details in a real
- * implementation such as saving enough registers/state to be
- * able to do something real. Keep in mind that the goal is
- * to invoke a user's ISR handler which is written in C and
- * uses a certain set of registers.
- *
- * Also note that the exact order is to a large extent flexible.
- * Hardware will dictate a sequence for a certain subset of
- * _ISR_Handler while requirements for setting
- */
-
- /*
- * At entry to "common" _ISR_Handler, the vector number must be
- * available. On some CPUs the hardware puts either the vector
- * number or the offset into the vector table for this ISR in a
- * known place. If the hardware does not give us this information,
- * then the assembly portion of RTEMS for this port will contain
- * a set of distinct interrupt entry points which somehow place
- * the vector number in a known place (which is safe if another
- * interrupt nests this one) and branches to _ISR_Handler.
- *
- * save some or all context on stack
- * may need to save some special interrupt information for exit
- *
- * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
- * if ( _ISR_Nest_level == 0 )
- * switch to software interrupt stack
- * #endif
- *
- * _ISR_Nest_level++;
- *
- * _Thread_Dispatch_disable_level++;
- *
- * (*_ISR_Vector_table[ vector ])( vector );
- *
- * _Thread_Dispatch_disable_level--;
- *
- * --_ISR_Nest_level;
- *
- * if ( _ISR_Nest_level )
- * goto the label "exit interrupt (simple case)"
- *
- * if ( _Thread_Dispatch_disable_level )
- * goto the label "exit interrupt (simple case)"
- *
- * if ( _Thread_Dispatch_necessary ) {
- * call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
- * prepare to get out of interrupt
- * return from interrupt (maybe to _ISR_Dispatch)
- *
- * LABEL "exit interrupt (simple case):
- * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
- * if outermost interrupt
- * restore stack
- * #endif
- * prepare to get out of interrupt
- * return from interrupt
- */
-}
-#endif
diff --git a/cpukit/score/cpu/v850/include/rtems/score/cpu.h b/cpukit/score/cpu/v850/include/rtems/score/cpu.h
index dbae3c4234..f19efa9bec 100644
--- a/cpukit/score/cpu/v850/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/v850/include/rtems/score/cpu.h
@@ -29,35 +29,6 @@ extern "C" {
/* conditional compilation parameters */
/**
- * Does RTEMS manage a dedicated interrupt stack in software?
- *
- * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization.
- * If FALSE, nothing is done.
- *
- * If the CPU supports a dedicated interrupt stack in hardware,
- * then it is generally the responsibility of the BSP to allocate it
- * and set it up.
- *
- * If the CPU does not support a dedicated interrupt stack, then
- * the porter has two options: (1) execute interrupts on the
- * stack of the interrupted task, and (2) have RTEMS manage a dedicated
- * interrupt stack.
- *
- * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * Port Specific Information:
- *
- * The v850 does not have support for a hardware interrupt stack.
- */
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE
-
-/**
* Does the CPU follow the simple vectored interrupt model?
*
* If TRUE, then RTEMS allocates the vector table it internally manages.
@@ -71,40 +42,6 @@ extern "C" {
#define CPU_SIMPLE_VECTORED_INTERRUPTS FALSE
/**
- * Does this CPU have hardware support for a dedicated interrupt stack?
- *
- * If TRUE, then it must be installed during initialization.
- * If FALSE, then no installation is performed.
- *
- * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * Port Specific Information:
- *
- * The v850 does not have support for a hardware interrupt stack.
- */
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
-
-/**
- * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager?
- *
- * If TRUE, then the memory is allocated during initialization.
- * If FALSE, then the memory is allocated during initialization.
- *
- * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_ALLOCATE_INTERRUPT_STACK TRUE
-
-/**
* @def CPU_HARDWARE_FP
*
* Does the CPU have hardware floating point?
@@ -389,21 +326,6 @@ typedef struct {
/**
* @defgroup CPUInterrupt Processor Dependent Interrupt Management
- *
- * On some CPUs, RTEMS supports a software managed interrupt stack.
- * This stack is allocated by the Interrupt Manager and the switch
- * is performed in @ref _ISR_Handler. These variables contain pointers
- * to the lowest and highest addresses in the chunk of memory allocated
- * for the interrupt stack. Since it is unknown whether the stack
- * grows up or down (in general), this give the CPU dependent
- * code the option of picking the version it wants to use.
- *
- * @note These two variables are required if the macro
- * @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
*/
/**@{**/
diff --git a/cpukit/score/src/isr.c b/cpukit/score/src/isr.c
index 1078ef6f63..3bda275b07 100644
--- a/cpukit/score/src/isr.c
+++ b/cpukit/score/src/isr.c
@@ -23,7 +23,6 @@
#include <rtems/score/interr.h>
#include <rtems/score/percpu.h>
#include <rtems/score/stackimpl.h>
-#include <rtems/score/wkspace.h>
#include <rtems/config.h>
#if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
@@ -36,51 +35,48 @@
void _ISR_Handler_initialization( void )
{
+ uint32_t cpu_max;
+ uint32_t cpu_index;
+ size_t stack_size;
+ char *stack_low;
+
_ISR_Nest_level = 0;
#if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
_CPU_Initialize_vectors();
#endif
-#if ( CPU_ALLOCATE_INTERRUPT_STACK == TRUE )
- {
- size_t stack_size = rtems_configuration_get_interrupt_stack_size();
- uint32_t cpu_max = rtems_configuration_get_maximum_processors();
- uint32_t cpu_index;
+ stack_size = rtems_configuration_get_interrupt_stack_size();
- if ( !_Stack_Is_enough( stack_size ) )
- _Internal_error( INTERNAL_ERROR_INTERRUPT_STACK_TOO_SMALL );
+ if ( !_Stack_Is_enough( stack_size ) )
+ _Internal_error( INTERNAL_ERROR_INTERRUPT_STACK_TOO_SMALL );
- for ( cpu_index = 0 ; cpu_index < cpu_max; ++cpu_index ) {
- Per_CPU_Control *cpu = _Per_CPU_Get_by_index( cpu_index );
- void *low = _Workspace_Allocate_or_fatal_error( stack_size );
- void *high = _Addresses_Add_offset( low, stack_size );
+ cpu_max = rtems_configuration_get_maximum_processors();
+ stack_low = _Configuration_Interrupt_stack_area_begin;
-#if (CPU_STACK_ALIGNMENT != 0)
- high = _Addresses_Align_down( high, CPU_STACK_ALIGNMENT );
-#endif
+ for ( cpu_index = 0 ; cpu_index < cpu_max; ++cpu_index ) {
+ Per_CPU_Control *cpu;
+ char *stack_high;
- cpu->interrupt_stack_low = low;
- cpu->interrupt_stack_high = high;
+ cpu = _Per_CPU_Get_by_index( cpu_index );
+ stack_high = _Addresses_Add_offset( stack_low, stack_size );
- /*
- * Interrupt stack might have to be aligned and/or setup in a specific
- * way. Do not use the local low or high variables here since
- * _CPU_Interrupt_stack_setup() is a nasty macro that might want to play
- * with the real memory locations.
- */
-#if defined(_CPU_Interrupt_stack_setup)
- _CPU_Interrupt_stack_setup(
- cpu->interrupt_stack_low,
- cpu->interrupt_stack_high
- );
-#endif
- }
- }
+ cpu->interrupt_stack_low = stack_low;
+ cpu->interrupt_stack_high = stack_high;
+ /*
+ * Interrupt stack might have to be aligned and/or setup in a specific
+ * way. Do not use the local low or high variables here since
+ * _CPU_Interrupt_stack_setup() is a nasty macro that might want to play
+ * with the real memory locations.
+ */
+#if defined(_CPU_Interrupt_stack_setup)
+ _CPU_Interrupt_stack_setup(
+ cpu->interrupt_stack_low,
+ cpu->interrupt_stack_high
+ );
#endif
-#if ( CPU_HAS_HARDWARE_INTERRUPT_STACK == TRUE )
- _CPU_Install_interrupt_stack();
-#endif
+ stack_low = stack_high;
+ }
}
diff --git a/cpukit/score/src/percpuasm.c b/cpukit/score/src/percpuasm.c
index 2908643f6c..ccd101a929 100644
--- a/cpukit/score/src/percpuasm.c
+++ b/cpukit/score/src/percpuasm.c
@@ -122,17 +122,14 @@ RTEMS_STATIC_ASSERT(
);
#endif
-#if CPU_ALLOCATE_INTERRUPT_STACK == TRUE \
- || CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE
- RTEMS_STATIC_ASSERT(
- offsetof(Per_CPU_Control, interrupt_stack_low)
- == PER_CPU_INTERRUPT_STACK_LOW,
- PER_CPU_INTERRUPT_STACK_LOW
- );
+RTEMS_STATIC_ASSERT(
+ offsetof(Per_CPU_Control, interrupt_stack_low)
+ == PER_CPU_INTERRUPT_STACK_LOW,
+ PER_CPU_INTERRUPT_STACK_LOW
+);
- RTEMS_STATIC_ASSERT(
- offsetof(Per_CPU_Control, interrupt_stack_high)
- == PER_CPU_INTERRUPT_STACK_HIGH,
- PER_CPU_INTERRUPT_STACK_HIGH
- );
-#endif
+RTEMS_STATIC_ASSERT(
+ offsetof(Per_CPU_Control, interrupt_stack_high)
+ == PER_CPU_INTERRUPT_STACK_HIGH,
+ PER_CPU_INTERRUPT_STACK_HIGH
+);