diff options
Diffstat (limited to 'cpukit')
| -rw-r--r-- | cpukit/score/cpu/i960/rtems/score/i960.h | 4 | ||||
| -rw-r--r-- | cpukit/score/cpu/sparc/Makefile.am | 4 | ||||
| -rw-r--r-- | cpukit/score/cpu/sparc/asm.h | 2 | ||||
| -rw-r--r-- | cpukit/score/cpu/sparc/cpu.c | 54 | ||||
| -rw-r--r-- | cpukit/score/cpu/sparc/cpu_asm.S | 7 | ||||
| -rw-r--r-- | cpukit/score/cpu/sparc/rtems/asm.h | 2 | ||||
| -rw-r--r-- | cpukit/score/cpu/sparc/rtems/score/cpu.h | 21 | ||||
| -rw-r--r-- | cpukit/score/cpu/sparc/rtems/score/sparc.h | 49 | ||||
| -rw-r--r-- | cpukit/score/cpu/sparc/rtems/score/types.h | 7 | ||||
| -rw-r--r-- | cpukit/score/include/rtems/system.h | 9 |
10 files changed, 32 insertions, 127 deletions
diff --git a/cpukit/score/cpu/i960/rtems/score/i960.h b/cpukit/score/cpu/i960/rtems/score/i960.h index 799d493279..6cc60af8c9 100644 --- a/cpukit/score/cpu/i960/rtems/score/i960.h +++ b/cpukit/score/cpu/i960/rtems/score/i960.h @@ -72,9 +72,9 @@ extern "C" { */ #if I960_HAS_FPU -#define CPU_MODEL_NAME "i960 w/FPU" +#define CPU_MODEL_NAME "w/FPU" #else -#define CPU_MODEL_NAME "i960 w/soft-float" +#define CPU_MODEL_NAME "w/soft-float" #endif #ifndef ASM diff --git a/cpukit/score/cpu/sparc/Makefile.am b/cpukit/score/cpu/sparc/Makefile.am index 493f2c8e76..e0c9eebd20 100644 --- a/cpukit/score/cpu/sparc/Makefile.am +++ b/cpukit/score/cpu/sparc/Makefile.am @@ -10,7 +10,7 @@ SUBDIRS = rtems C_FILES = cpu.c C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o) -H_FILES = asm.h erc32.h +H_FILES = asm.h S_FILES = cpu_asm.S S_O_FILES = $(S_FILES:%.S=$(ARCH)/%.o) @@ -43,7 +43,7 @@ all-local: $(ARCH) $(PREINSTALL_FILES) $(rtems_cpu_rel_OBJECTS) $(REL) \ .PRECIOUS: $(REL) -EXTRA_DIST = asm.h cpu.c cpu_asm.S erc32.h rtems.S +EXTRA_DIST = asm.h cpu.c cpu_asm.S rtems.S include $(top_srcdir)/../../../../../../automake/subdirs.am include $(top_srcdir)/../../../../../../automake/local.am diff --git a/cpukit/score/cpu/sparc/asm.h b/cpukit/score/cpu/sparc/asm.h index cdb906af58..1920de8100 100644 --- a/cpukit/score/cpu/sparc/asm.h +++ b/cpukit/score/cpu/sparc/asm.h @@ -108,7 +108,7 @@ mov _vector, %l3 /* - * Used for the reset trap for ERC32 to avoid a supervisor instruction + * Used for the reset trap to avoid a supervisor instruction */ #define RTRAP(_vector, _handler) \ diff --git a/cpukit/score/cpu/sparc/cpu.c b/cpukit/score/cpu/sparc/cpu.c index 9a78a0fc96..2ba0815058 100644 --- a/cpukit/score/cpu/sparc/cpu.c +++ b/cpukit/score/cpu/sparc/cpu.c @@ -8,23 +8,12 @@ * found in the file LICENSE in this distribution or at * http://www.OARcorp.com/rtems/license.html. * - * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space - * Agency (ESA). - * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. - * European Space Agency. - * * $Id$ */ #include <rtems/system.h> #include <rtems/score/isr.h> -#if defined(erc32) -#include <erc32.h> -#endif - /* * This initializes the set of opcodes placed in each trap * table entry. The routine which installs a handler is responsible @@ -111,20 +100,6 @@ void _CPU_Initialize( */ _CPU_Table = *cpu_table; - -#if defined(erc32) - - /* - * ERC32 specific initialization - */ - - _ERC32_MEC_Timer_Control_Mirror = 0; - ERC32_MEC.Timer_Control = 0; - - ERC32_MEC.Control |= ERC32_CONFIGURATION_POWER_DOWN_ALLOWED; - -#endif - } /*PAGE @@ -377,32 +352,3 @@ void _CPU_Context_Initialize( #endif the_context->psr = tmp_psr; } - -/*PAGE - * - * _CPU_Thread_Idle_body - * - * Some SPARC implementations have low power, sleep, or idle modes. This - * tries to take advantage of those models. - */ - -#if (CPU_PROVIDES_IDLE_THREAD_BODY == TRUE) - -/* - * This is the implementation for the erc32. - * - * NOTE: Low power mode was enabled at initialization time. - */ - -#if defined(erc32) - -void _CPU_Thread_Idle_body( void ) -{ - while (1) { - ERC32_MEC.Power_Down = 0; /* value is irrelevant */ - } -} - -#endif - -#endif /* CPU_PROVIDES_IDLE_THREAD_BODY */ diff --git a/cpukit/score/cpu/sparc/cpu_asm.S b/cpukit/score/cpu/sparc/cpu_asm.S index af7df160ef..20d686c330 100644 --- a/cpukit/score/cpu/sparc/cpu_asm.S +++ b/cpukit/score/cpu/sparc/cpu_asm.S @@ -11,13 +11,6 @@ * found in the file LICENSE in this distribution or at * http://www.OARcorp.com/rtems/license.html. * - * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space - * Agency (ESA). - * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. - * European Space Agency. - * * $Id$ */ diff --git a/cpukit/score/cpu/sparc/rtems/asm.h b/cpukit/score/cpu/sparc/rtems/asm.h index cdb906af58..1920de8100 100644 --- a/cpukit/score/cpu/sparc/rtems/asm.h +++ b/cpukit/score/cpu/sparc/rtems/asm.h @@ -108,7 +108,7 @@ mov _vector, %l3 /* - * Used for the reset trap for ERC32 to avoid a supervisor instruction + * Used for the reset trap to avoid a supervisor instruction */ #define RTRAP(_vector, _handler) \ diff --git a/cpukit/score/cpu/sparc/rtems/score/cpu.h b/cpukit/score/cpu/sparc/rtems/score/cpu.h index ab81a85e5f..5baf9aac5f 100644 --- a/cpukit/score/cpu/sparc/rtems/score/cpu.h +++ b/cpukit/score/cpu/sparc/rtems/score/cpu.h @@ -10,13 +10,6 @@ * found in the file LICENSE in this distribution or at * http://www.OARcorp.com/rtems/license.html. * - * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space - * Agency (ESA). - * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. - * European Space Agency. - * * $Id$ */ @@ -160,11 +153,7 @@ extern "C" { * not provide one. */ -#if (SPARC_HAS_LOW_POWER_MODE == 1) -#define CPU_PROVIDES_IDLE_THREAD_BODY TRUE -#else #define CPU_PROVIDES_IDLE_THREAD_BODY FALSE -#endif /* * Does the stack grow up (toward higher addresses) or down @@ -560,16 +549,6 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context CPU_STRUCTURE_ALIGNMENT; SCORE_EXTERN void *_CPU_Interrupt_stack_low; SCORE_EXTERN void *_CPU_Interrupt_stack_high; -#if defined(erc32) - -/* - * ERC32 Specific Variables - */ - -SCORE_EXTERN unsigned32 _ERC32_MEC_Timer_Control_Mirror; - -#endif - /* * The following type defines an entry in the SPARC's trap table. * diff --git a/cpukit/score/cpu/sparc/rtems/score/sparc.h b/cpukit/score/cpu/sparc/rtems/score/sparc.h index 9fa52533cd..1d09116295 100644 --- a/cpukit/score/cpu/sparc/rtems/score/sparc.h +++ b/cpukit/score/cpu/sparc/rtems/score/sparc.h @@ -10,13 +10,6 @@ * found in the file LICENSE in this distribution or at * http://www.OARcorp.com/rtems/license.html. * - * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space - * Agency (ESA). - * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. - * European Space Agency. - * * $Id$ */ @@ -47,37 +40,37 @@ extern "C" { * + SPARC_NUMBER_OF_REGISTER_WINDOWS * 8 is the most common number supported by SPARC implementations. * SPARC_PSR_CWP_MASK is derived from this value. - * - * + SPARC_HAS_LOW_POWER_MODE - * 0 - does not have low power mode support (or not supported) - * 1 - has low power mode and thus a CPU model dependent idle task. - * */ -#if defined(rtems_multilib) /* - * Figure out all CPU Model Feature Flags based upon compiler - * predefines. + * Some higher end SPARCs have a bitscan instructions. It would + * be nice to take advantage of them. Right now, there is no + * port to a CPU model with this feature and no (untested) code + * that is based on this feature flag. */ -#define CPU_MODEL_NAME "rtems_multilib" -#define SPARC_HAS_FPU 1 #define SPARC_HAS_BITSCAN 0 -#define SPARC_NUMBER_OF_REGISTER_WINDOWS 8 -#define SPARC_HAS_LOW_POWER_MODE 1 -#elif defined(erc32) - -#define CPU_MODEL_NAME "erc32" -#define SPARC_HAS_FPU 1 -#define SPARC_HAS_BITSCAN 0 +/* + * This should be OK until a port to a higher end SPARC processor + * is made that has more than 8 register windows. If this cannot + * be determined based on multilib settings (v7/v8/v9), then the + * cpu_asm.S code that depends on this will have to move to libcpu. + */ + #define SPARC_NUMBER_OF_REGISTER_WINDOWS 8 -#define SPARC_HAS_LOW_POWER_MODE 1 +/* + * This should be determined based on some soft float derived + * cpp predefine but gcc does not currently give us that information. + */ + +#define SPARC_HAS_FPU 1 + +#if SPARC_HAS_FPU +#define CPU_MODEL_NAME "w/FPU" #else - -#error "Unsupported CPU Model" - +#define CPU_MODEL_NAME "w/soft-float" #endif /* diff --git a/cpukit/score/cpu/sparc/rtems/score/types.h b/cpukit/score/cpu/sparc/rtems/score/types.h index 1621d6fd5c..5e81acb4c7 100644 --- a/cpukit/score/cpu/sparc/rtems/score/types.h +++ b/cpukit/score/cpu/sparc/rtems/score/types.h @@ -10,13 +10,6 @@ * found in the file LICENSE in this distribution or at * http://www.OARcorp.com/rtems/license.html. * - * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space - * Agency (ESA). - * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. - * European Space Agency. - * * $Id$ */ diff --git a/cpukit/score/include/rtems/system.h b/cpukit/score/include/rtems/system.h index f8f0ed14d8..553c8b404a 100644 --- a/cpukit/score/include/rtems/system.h +++ b/cpukit/score/include/rtems/system.h @@ -30,14 +30,15 @@ extern "C" { /* * FIXME: cpuopts.h should be included here. */ -#if defined(__sh__) \ +#if defined(__h8300__) \ + || defined(__i960__) \ || defined(__mc68000__) \ - || defined(__h8300__) \ - || defined(__i960__) + || defined(__sh__) \ + || defined(__sparc__) /* these cpus are ready to apply cpuopts.h */ #include <rtems/score/cpuopts.h> #else - /* fallback to targopts.h */ + /* fallback to targopts.h for hppa1.1, i386, mips, and powerpc */ #include <rtems/score/targopts.h> #endif |