diff options
Diffstat (limited to '')
| -rw-r--r-- | cpukit/score/cpu/arm/cpu.c | 1 | ||||
| -rw-r--r-- | cpukit/score/cpu/no_cpu/rtems/score/cpu.h | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/cpukit/score/cpu/arm/cpu.c b/cpukit/score/cpu/arm/cpu.c index dc87844483..b5738b11f4 100644 --- a/cpukit/score/cpu/arm/cpu.c +++ b/cpukit/score/cpu/arm/cpu.c @@ -109,6 +109,7 @@ void _CPU_Context_Initialize( the_context->register_lr = (uint32_t) entry_point; the_context->register_cpsr = ( ( new_level != 0 ) ? ARM_PSR_I : 0 ) | arm_cpu_mode; + the_context->isr_dispatch_disable = 0; #ifdef ARM_MULTILIB_HAS_THREAD_ID_REGISTER the_context->thread_id = (uint32_t) tls_area; diff --git a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h index 58a024ef0c..56081477d9 100644 --- a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h +++ b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h @@ -872,6 +872,10 @@ uint32_t _CPU_ISR_Get_level( void ); * in the context. The state of the "general data" registers is * undefined at task start time. * + * The ISR dispatch disable field of the context must be cleared to zero if it + * is used by the CPU port. Otherwise, a thread restart results in + * unpredictable behaviour. + * * @param[in] _the_context is the context structure to be initialized * @param[in] _stack_base is the lowest physical address of this task's stack * @param[in] _size is the size of this task's stack |