1 files changed, 130 insertions, 0 deletions
diff --git a/cpukit/score/src/threaddispatch.c b/cpukit/score/src/threaddispatch.c
new file mode 100644
index 0000000000..8c391d0d58
--- /dev/null
+++ b/cpukit/score/src/threaddispatch.c
@@ -0,0 +1,130 @@
+/*
+ *  Thread Handler
+ *
+ *
+ *  COPYRIGHT (c) 1989-1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#include <rtems/system.h>
+#include <rtems/score/apiext.h>
+#include <rtems/score/context.h>
+#include <rtems/score/interr.h>
+#include <rtems/score/isr.h>
+#include <rtems/score/object.h>
+#include <rtems/score/priority.h>
+#include <rtems/score/states.h>
+#include <rtems/score/sysstate.h>
+#include <rtems/score/thread.h>
+#include <rtems/score/threadq.h>
+#include <rtems/score/userext.h>
+#include <rtems/score/wkspace.h>
+
+/*PAGE
+ *
+ *  _Thread_Dispatch
+ *
+ *  This kernel routine determines if a dispatch is needed, and if so
+ *  dispatches to the heir thread.  Once the heir is running an attempt
+ *  is made to dispatch any ASRs.
+ *
+ *  ALTERNATE ENTRY POINTS:
+ *    void _Thread_Enable_dispatch();
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  INTERRUPT LATENCY:
+ *    dispatch thread
+ *    no dispatch thread
+ */
+
+#if ( CPU_INLINE_ENABLE_DISPATCH == FALSE )
+void _Thread_Enable_dispatch( void )
+{
+  if ( --_Thread_Dispatch_disable_level )
+    return;
+  _Thread_Dispatch();
+}
+#endif
+
+void _Thread_Dispatch( void )
+{
+  Thread_Control   *executing;
+  Thread_Control   *heir;
+  ISR_Level         level;
+
+  executing   = _Thread_Executing;
+  _ISR_Disable( level );
+  while ( _Context_Switch_necessary == TRUE ) {
+    heir = _Thread_Heir;
+    _Thread_Dispatch_disable_level = 1;
+    _Context_Switch_necessary = FALSE;
+    _Thread_Executing = heir;
+    executing->rtems_ada_self = rtems_ada_self;
+    rtems_ada_self = heir->rtems_ada_self;
+    _ISR_Enable( level );
+
+    heir->ticks_executed++;
+
+    _User_extensions_Thread_switch( executing, heir );
+
+    if ( heir->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE )
+      heir->cpu_time_budget = _Thread_Ticks_per_timeslice;
+
+    /*
+     *  If the CPU has hardware floating point, then we must address saving
+     *  and restoring it as part of the context switch.
+     *
+     *  The second conditional compilation section selects the algorithm used
+     *  to context switch between floating point tasks.  The deferred algorithm
+     *  can be significantly better in a system with few floating point tasks
+     *  because it reduces the total number of save and restore FP context
+     *  operations.  However, this algorithm can not be used on all CPUs due
+     *  to unpredictable use of FP registers by some compilers for integer
+     *  operations.
+     */
+
+#if ( CPU_HARDWARE_FP == TRUE )
+#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
+    if ( (heir->fp_context != NULL) && !_Thread_Is_allocated_fp( heir ) ) {
+      if ( _Thread_Allocated_fp != NULL )
+        _Context_Save_fp( &_Thread_Allocated_fp->fp_context );
+      _Context_Restore_fp( &heir->fp_context );
+      _Thread_Allocated_fp = heir;
+    }
+#else
+    if ( executing->fp_context != NULL )
+      _Context_Save_fp( &executing->fp_context );
+
+    if ( heir->fp_context != NULL )
+      _Context_Restore_fp( &heir->fp_context );
+#endif
+#endif
+
+    _Context_Switch( &executing->Registers, &heir->Registers );
+
+    executing = _Thread_Executing;
+
+    _ISR_Disable( level );
+  }
+
+  _Thread_Dispatch_disable_level = 0;
+
+  _ISR_Enable( level );
+
+  if ( _Thread_Do_post_task_switch_extension ||
+       executing->do_post_task_switch_extension ) {
+    executing->do_post_task_switch_extension = FALSE;
+    _API_extensions_Run_postswitch();
+  }
+ 
+}