1 files changed, 0 insertions, 73 deletions
diff --git a/cpukit/score/cpu/v850/cpu_asm.S b/cpukit/score/cpu/v850/cpu_asm.S
index 328c71cea2..e9aa738d13 100644
--- a/cpukit/score/cpu/v850/cpu_asm.S
+++ b/cpukit/score/cpu/v850/cpu_asm.S
@@ -138,76 +138,3 @@ restore:
 __CPU_Context_restore:
         mov      r6, r7         /* move to second parameter register */
         br       restore
-
-#if 0
-/**
- *  This routine provides the RTEMS interrupt management.
- *
- *  v850 Specific Information:
- *
- *  XXX document implementation including references if appropriate
- */
-void _ISR_Handler(void); /* C warning avoidance */
-void _ISR_Handler(void)
-{
-   /*
-    *  This discussion ignores a lot of the ugly details in a real
-    *  implementation such as saving enough registers/state to be
-    *  able to do something real.  Keep in mind that the goal is
-    *  to invoke a user's ISR handler which is written in C and
-    *  uses a certain set of registers.
-    *
-    *  Also note that the exact order is to a large extent flexible.
-    *  Hardware will dictate a sequence for a certain subset of
-    *  _ISR_Handler while requirements for setting
-    */
-
-  /*
-   *  At entry to "common" _ISR_Handler, the vector number must be
-   *  available.  On some CPUs the hardware puts either the vector
-   *  number or the offset into the vector table for this ISR in a
-   *  known place.  If the hardware does not give us this information,
-   *  then the assembly portion of RTEMS for this port will contain
-   *  a set of distinct interrupt entry points which somehow place
-   *  the vector number in a known place (which is safe if another
-   *  interrupt nests this one) and branches to _ISR_Handler.
-   *
-   *  save some or all context on stack
-   *  may need to save some special interrupt information for exit
-   *
-   *  #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
-   *    if ( _ISR_Nest_level == 0 )
-   *      switch to software interrupt stack
-   *  #endif
-   *
-   *  _ISR_Nest_level++;
-   *
-   *  _Thread_Dispatch_disable_level++;
-   *
-   *  (*_ISR_Vector_table[ vector ])( vector );
-   *
-   *  _Thread_Dispatch_disable_level--;
-   *
-   *  --_ISR_Nest_level;
-   *
-   *  if ( _ISR_Nest_level )
-   *    goto the label "exit interrupt (simple case)"
-   *
-   *  if ( _Thread_Dispatch_disable_level )
-   *    goto the label "exit interrupt (simple case)"
-   *
-   *  if ( _Thread_Dispatch_necessary ) {
-   *    call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
-   *    prepare to get out of interrupt
-   *    return from interrupt  (maybe to _ISR_Dispatch)
-   *
-   *  LABEL "exit interrupt (simple case):
-   *  #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
-   *    if outermost interrupt
-   *      restore stack
-   *  #endif
-   *  prepare to get out of interrupt
-   *  return from interrupt
-   */
-}
-#endif