summaryrefslogtreecommitdiffstats
path: root/cpukit/score/cpu/sparc/rtems/score/cpu.h
diff options
context:
space:
mode:
Diffstat (limited to 'cpukit/score/cpu/sparc/rtems/score/cpu.h')
-rw-r--r--cpukit/score/cpu/sparc/rtems/score/cpu.h25
1 files changed, 24 insertions, 1 deletions
diff --git a/cpukit/score/cpu/sparc/rtems/score/cpu.h b/cpukit/score/cpu/sparc/rtems/score/cpu.h
index 5d5f1e4aac..02891b0438 100644
--- a/cpukit/score/cpu/sparc/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sparc/rtems/score/cpu.h
@@ -341,7 +341,11 @@ typedef struct {
/** This defines the size of the minimum stack frame. */
#define CPU_MINIMUM_STACK_FRAME_SIZE 0x60
-#define CPU_PER_CPU_CONTROL_SIZE 4
+#if ( SPARC_HAS_FPU == 1 )
+ #define CPU_PER_CPU_CONTROL_SIZE 8
+#else
+ #define CPU_PER_CPU_CONTROL_SIZE 4
+#endif
/**
* @brief Offset of the CPU_Per_CPU_control::isr_dispatch_disable field
@@ -349,6 +353,14 @@ typedef struct {
*/
#define SPARC_PER_CPU_ISR_DISPATCH_DISABLE 0
+#if ( SPARC_HAS_FPU == 1 )
+ /**
+ * @brief Offset of the CPU_Per_CPU_control::fsr field relative to the
+ * Per_CPU_Control begin.
+ */
+ #define SPARC_PER_CPU_FSR_OFFSET 4
+#endif
+
/**
* @defgroup Contexts SPARC Context Structures
*
@@ -380,6 +392,17 @@ typedef struct {
* attempts on a previously interrupted thread's stack.
*/
uint32_t isr_dispatch_disable;
+
+#if ( SPARC_HAS_FPU == 1 )
+ /**
+ * @brief Memory location to store the FSR register during interrupt
+ * processing.
+ *
+ * This is a write-only field. The FSR is written to force a completion of
+ * floating point operations in progress.
+ */
+ uint32_t fsr;
+#endif
} CPU_Per_CPU_control;
/**