diff options
Diffstat (limited to 'cpukit/score/cpu/sparc/include/libcpu/byteorder.h')
| -rw-r--r-- | cpukit/score/cpu/sparc/include/libcpu/byteorder.h | 41 |
1 files changed, 30 insertions, 11 deletions
diff --git a/cpukit/score/cpu/sparc/include/libcpu/byteorder.h b/cpukit/score/cpu/sparc/include/libcpu/byteorder.h index 6726a785f8..0c469ba36b 100644 --- a/cpukit/score/cpu/sparc/include/libcpu/byteorder.h +++ b/cpukit/score/cpu/sparc/include/libcpu/byteorder.h @@ -1,12 +1,31 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /* * byteorder.h - Endian conversion for SPARC. SPARC is big endian only. * * COPYRIGHT (c) 2011 * Aeroflex Gaisler. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef _LIBCPU_BYTEORDER_H @@ -18,42 +37,42 @@ extern "C" { #endif -RTEMS_INLINE_ROUTINE uint16_t ld_le16(volatile uint16_t *addr) +static inline uint16_t ld_le16(volatile uint16_t *addr) { return CPU_swap_u16(*addr); } -RTEMS_INLINE_ROUTINE void st_le16(volatile uint16_t *addr, uint16_t val) +static inline void st_le16(volatile uint16_t *addr, uint16_t val) { *addr = CPU_swap_u16(val); } -RTEMS_INLINE_ROUTINE uint32_t ld_le32(volatile uint32_t *addr) +static inline uint32_t ld_le32(volatile uint32_t *addr) { return CPU_swap_u32(*addr); } -RTEMS_INLINE_ROUTINE void st_le32(volatile uint32_t *addr, uint32_t val) +static inline void st_le32(volatile uint32_t *addr, uint32_t val) { *addr = CPU_swap_u32(val); } -RTEMS_INLINE_ROUTINE uint16_t ld_be16(volatile uint16_t *addr) +static inline uint16_t ld_be16(volatile uint16_t *addr) { return *addr; } -RTEMS_INLINE_ROUTINE void st_be16(volatile uint16_t *addr, uint16_t val) +static inline void st_be16(volatile uint16_t *addr, uint16_t val) { *addr = val; } -RTEMS_INLINE_ROUTINE uint32_t ld_be32(volatile uint32_t *addr) +static inline uint32_t ld_be32(volatile uint32_t *addr) { return *addr; } -RTEMS_INLINE_ROUTINE void st_be32(volatile uint32_t *addr, uint32_t val) +static inline void st_be32(volatile uint32_t *addr, uint32_t val) { *addr = val; } |