diff options
Diffstat (limited to 'cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h')
| -rw-r--r-- | cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h index 5fd25e32cf..13fd60ed8c 100644 --- a/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h @@ -5,7 +5,7 @@ */ /* - * Copyright (c) 2013, 2018 embedded brains GmbH + * Copyright (C) 2013, 2018 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -54,6 +54,8 @@ #define CPU_PER_CPU_CONTROL_SIZE 16 #endif +#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10 + #ifdef RTEMS_SMP #define RISCV_CONTEXT_IS_EXECUTING 0 #endif @@ -296,6 +298,16 @@ extern "C" { #endif +static inline uint32_t _RISCV_Map_hardid_to_cpu_index( uint32_t hardid ) +{ + return hardid - RISCV_BOOT_HARTID; +} + +static inline uint32_t _RISCV_Map_cpu_index_to_hardid( uint32_t cpu_index ) +{ + return cpu_index + RISCV_BOOT_HARTID; +} + /* Core Local Interruptor (CLINT) */ typedef union { @@ -442,6 +454,13 @@ static inline void _CPU_Use_thread_local_storage( __asm__ volatile ( "" : : "r" ( tp ) ); } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + return (void *) context->tp; +} + #ifdef __cplusplus } #endif |