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-rw-r--r--cpukit/score/cpu/mips/rtems/score/mips.h36
1 files changed, 36 insertions, 0 deletions
diff --git a/cpukit/score/cpu/mips/rtems/score/mips.h b/cpukit/score/cpu/mips/rtems/score/mips.h
index 0527721b8c..ce772adac6 100644
--- a/cpukit/score/cpu/mips/rtems/score/mips.h
+++ b/cpukit/score/cpu/mips/rtems/score/mips.h
@@ -90,6 +90,42 @@ extern "C" {
asm volatile( "mtc0 %0, $12; nop" : : "r" (__x) ); \
} while (0)
+
+
+
+
+#define mips_get_cause( _x ) \
+ do { \
+ asm volatile( "mfc0 %0, $13; nop" : "=r" (_x) : ); \
+ } while (0)
+
+
+#define mips_set_cause( _x ) \
+ do { \
+ register unsigned int __x = (_x); \
+ asm volatile( "mtc0 %0, $13; nop" : : "r" (__x) ); \
+ } while (0)
+
+
+
+
+
+#define mips_get_fcr31( _x ) \
+ do { \
+ asm volatile( "cfc1 %0, $31; nop" : "=r" (_x) : ); \
+ } while(0)
+
+
+#define mips_set_fcr31( _x ) \
+ do { \
+ register unsigned int __x = (_x); \
+ asm volatile( "ctc1 %0, $31; nop" : : "r" (__x) ); \
+ } while(0)
+
+
+
+
+
/*
* Manipulate interrupt mask
*