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Diffstat (limited to 'cpukit/score/cpu/mips/ChangeLog')
| -rw-r--r-- | cpukit/score/cpu/mips/ChangeLog | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog index c46f9f0a1c..f78e26e011 100644 --- a/cpukit/score/cpu/mips/ChangeLog +++ b/cpukit/score/cpu/mips/ChangeLog @@ -1,3 +1,10 @@ +2004-04-03 Art Ferrer <arturo.b.ferrer@nasa.gov> + + PR 598/bsps + * cpu_asm.S, rtems/score/cpu.h: Add save of floating point + status/control register on context switches. Missing this register + was causing intermittent floating point errors. + 2003-09-04 Joel Sherrill <joel@OARcorp.com> * cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/mips.h, |