diff options
Diffstat (limited to 'cpukit/score/cpu/m32r')
| -rw-r--r-- | cpukit/score/cpu/m32r/cpu.c | 4 | ||||
| -rw-r--r-- | cpukit/score/cpu/m32r/cpu_asm.c | 2 | ||||
| -rw-r--r-- | cpukit/score/cpu/m32r/rtems/score/cpu.h | 34 | ||||
| -rw-r--r-- | cpukit/score/cpu/m32r/rtems/score/m32r.h | 16 |
4 files changed, 28 insertions, 28 deletions
diff --git a/cpukit/score/cpu/m32r/cpu.c b/cpukit/score/cpu/m32r/cpu.c index 8ac22ee440..fa90835b9a 100644 --- a/cpukit/score/cpu/m32r/cpu.c +++ b/cpukit/score/cpu/m32r/cpu.c @@ -36,7 +36,7 @@ void _CPU_Initialize(void) * * XXX document implementation including references if appropriate */ - + uint32_t _CPU_ISR_Get_level( void ) { return 0; @@ -50,7 +50,7 @@ uint32_t _CPU_ISR_Get_level( void ) * * XXX document implementation including references if appropriate */ - + void _CPU_ISR_install_raw_handler( uint32_t vector, proc_ptr new_handler, diff --git a/cpukit/score/cpu/m32r/cpu_asm.c b/cpukit/score/cpu/m32r/cpu_asm.c index 11e7af58ca..b046ad4449 100644 --- a/cpukit/score/cpu/m32r/cpu_asm.c +++ b/cpukit/score/cpu/m32r/cpu_asm.c @@ -84,7 +84,7 @@ void _ISR_Handler(void) * * LABEL "exit interrupt (simple case): * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE ) - * if outermost interrupt + * if outermost interrupt * restore stack * #endif * prepare to get out of interrupt diff --git a/cpukit/score/cpu/m32r/rtems/score/cpu.h b/cpukit/score/cpu/m32r/rtems/score/cpu.h index 97fef9a61e..234b41f1e0 100644 --- a/cpukit/score/cpu/m32r/rtems/score/cpu.h +++ b/cpukit/score/cpu/m32r/rtems/score/cpu.h @@ -13,7 +13,7 @@ * * + Anywhere there is an XXX, it should be replaced * with information about the CPU family being ported to. - * + * * + At the end of each comment section, there is a heading which * says "Port Specific Information:". When porting to RTEMS, * add CPU family specific information in this section @@ -168,7 +168,7 @@ extern "C" { /** * Does the RTEMS invoke the user's ISR with the vector number and - * a pointer to the saved interrupt frame (1) or just the vector + * a pointer to the saved interrupt frame (1) or just the vector * number (0)? * * Port Specific Information: @@ -195,7 +195,7 @@ extern "C" { * an i387 and wish to leave floating point support out of RTEMS. */ -/** +/** * @def CPU_SOFTWARE_FP * * Does the CPU have no hardware floating point and GCC provides a @@ -203,7 +203,7 @@ extern "C" { * switched? * * This feature conditional is used to indicate whether or not there - * is software implemented floating point that must be context + * is software implemented floating point that must be context * switched. The determination of whether or not this applies * is very tool specific and the state saved/restored is also * compiler specific. @@ -494,7 +494,7 @@ typedef struct { * This macro returns the stack pointer associated with @a _context. * * @param[in] _context is the thread context area to access - * + * * @return This method returns the stack pointer. */ #define _CPU_Context_Get_SP( _context ) \ @@ -517,7 +517,7 @@ typedef struct { * in @ref Context_Control. */ typedef struct { - /** This field is a hint that a port will have a number of integer + /** This field is a hint that a port will have a number of integer * registers that need to be saved when an interrupt occurs or * when a context switch occurs at the end of an ISR. */ @@ -557,14 +557,14 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context; /** * @ingroup CPUInterrupt - * This variable points to the lowest physical address of the interrupt + * This variable points to the lowest physical address of the interrupt * stack. */ SCORE_EXTERN void *_CPU_Interrupt_stack_low; /** * @ingroup CPUInterrupt - * This variable points to the lowest physical address of the interrupt + * This variable points to the lowest physical address of the interrupt * stack. */ SCORE_EXTERN void *_CPU_Interrupt_stack_high; @@ -658,7 +658,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; * * @note This does not have to be a power of 2 although it should be * a multiple of 2 greater than or equal to 2. The requirement - * to be a multiple of 2 is because the heap uses the least + * to be a multiple of 2 is because the heap uses the least * significant field of the front and back flags to indicate * that a block is in use or free. So you do not want any odd * length blocks really putting length data in that bit. @@ -939,7 +939,7 @@ void _CPU_Context_Restart_self( /** * @defgroup CPUBitfield Processor Dependent Bitfield Manipulation * - * This set of routines are used to implement fast searches for + * This set of routines are used to implement fast searches for * the most important ready task. */ @@ -964,7 +964,7 @@ void _CPU_Context_Restart_self( /** * @ingroup CPUBitfield * This routine sets @a _output to the bit number of the first bit - * set in @a _value. @a _value is of CPU dependent type + * set in @a _value. @a _value is of CPU dependent type * @a Priority_Bit_map_control. This type may be either 16 or 32 bits * wide although only the 16 least significant bits will be used. * @@ -1007,14 +1007,14 @@ void _CPU_Context_Restart_self( if _value > 0x00ff _value >>=8 _number = 8; - + if _value > 0x0000f _value >=8 _number += 4 - + _number += bit_set_table[ _value ] @endverbatim - + * where bit_set_table[ 16 ] has values which indicate the first * bit set * @@ -1086,7 +1086,7 @@ void _CPU_Initialize(void); /** * @ingroup CPUInterrupt - * This routine installs a "raw" interrupt handler directly into the + * This routine installs a "raw" interrupt handler directly into the * processor's vector table. * * @param[in] vector is the vector number @@ -1236,12 +1236,12 @@ static inline uint32_t CPU_swap_u32( ) { uint32_t byte1, byte2, byte3, byte4, swapped; - + byte4 = (value >> 24) & 0xff; byte3 = (value >> 16) & 0xff; byte2 = (value >> 8) & 0xff; byte1 = value & 0xff; - + swapped = (byte1 << 24) | (byte2 << 16) | (byte3 << 8) | byte4; return swapped; } diff --git a/cpukit/score/cpu/m32r/rtems/score/m32r.h b/cpukit/score/cpu/m32r/rtems/score/m32r.h index 15e168ab10..47238fc3db 100644 --- a/cpukit/score/cpu/m32r/rtems/score/m32r.h +++ b/cpukit/score/cpu/m32r/rtems/score/m32r.h @@ -1,5 +1,5 @@ /* - * This file sets up basic CPU dependency settings based on + * This file sets up basic CPU dependency settings based on * compiler settings. For example, it can determine if * floating point is available. This particular implementation * is specified to the NO CPU port. @@ -32,25 +32,25 @@ extern "C" { * that this port supports and which RTEMS CPU model they correspond * to. */ - + #if defined(rtems_multilib) /* - * Figure out all CPU Model Feature Flags based upon compiler - * predefines. + * Figure out all CPU Model Feature Flags based upon compiler + * predefines. */ #define CPU_MODEL_NAME "rtems_multilib" #define NOCPU_HAS_FPU 1 #elif defined(__m32r__) - + #define CPU_MODEL_NAME "m32r" #define NOCPU_HAS_FPU 1 - + #else - + #error "Unsupported CPU Model" - + #endif /* |